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121 lines
6.9 KiB
C
121 lines
6.9 KiB
C
/*
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* Copyright (C) 2023-2024 OpenMV, LLC.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Any redistribution, use, or modification in source or binary form
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* is done solely for personal benefit and not for any commercial
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* purpose or for monetary gain. For commercial licensing options,
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* please contact openmv@openmv.io
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*
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* THIS SOFTWARE IS PROVIDED BY THE LICENSOR AND COPYRIGHT OWNER "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE LICENSOR OR COPYRIGHT
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* OWNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Bootloader configuration.
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*/
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// *INDENT-OFF*
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#ifndef __OMV_BOOTCONFIG_H__
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#define __OMV_BOOTCONFIG_H__
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#include ALIF_CMSIS_H
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#include "port.h"
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#include "gpio.h"
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#include "pinconf.h"
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// Misc config.
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#define OMV_BOOT_VID (0x37C5)
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#define OMV_BOOT_PID (0x96E3)
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#define OMV_BOOT_DFU_TIMEOUT (1500)
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#define OMV_BOOT_MAGIC_ADDR (0x200FFFFCU)
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// Flash config.
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#define OMV_BOOT_AXI_FLASH_ENABLE (1)
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#define OMV_BOOT_SPI_FLASH_ENABLE (1)
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#define OMV_BOOT_REC_FLASH_ENABLE (1)
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// OSPI config.
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#define OMV_BOOT_OSPI_SER (1)
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#define OMV_BOOT_OSPI_RX_DELAY (4)
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#define OMV_BOOT_OSPI_DDR_EDGE (0)
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#define OMV_BOOT_OSPI_RXDS_DELAY (12)
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#define OMV_BOOT_OSPI_CLOCK (50000000)
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#define OMV_BOOT_OSPI_SSI_BASE (OSPI0_BASE)
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#define OMV_BOOT_OSPI_AES_BASE (AES0_BASE)
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#define OMV_BOOT_OSPI_XIP_BASE (OSPI0_XIP_BASE)
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// IRQ priorities.
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#define NVIC_PRIORITYGROUP_7 ((uint32_t)0x00000000U)
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#define OMV_BOOT_TIM_IRQ_PRI NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 0, 0)
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#define OMV_BOOT_USB_IRQ_PRI NVIC_EncodePriority(NVIC_PRIORITYGROUP_7, 5, 0)
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// Board GPIO pins (NOTE: indices in the pins table)
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#define OMV_BOOT_MUX_PIN (0)
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#define OMV_BOOT_LED_PIN (1)
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#define OMV_BOOT_OSPI_RST_PIN (2)
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#define OMV_BOOT_OSPI_D0_PIN (3)
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#define OMV_BOOT_OSPI_CS_PIN (13)
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#define OMV_BOOT_PAD_IO (PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA)
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#define OMV_BOOT_PAD_Dx (PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST | PADCTRL_READ_ENABLE)
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#define OMV_BOOT_PAD_D2 (OMV_BOOT_PAD_Dx | PADCTRL_DRIVER_DISABLED_PULL_UP)
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#define OMV_BOOT_PAD_Cx (PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST)
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#define OMV_BOOT_ALT_GPIO PINMUX_ALTERNATE_FUNCTION_0
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#define OMV_BOOT_ALT_OSPI PINMUX_ALTERNATE_FUNCTION_1
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#define ALIF_GPIO(x) ((GPIO_Type *) x##_BASE)
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static const pin_t omv_boot_pins[] = {
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{ .gpio = ALIF_GPIO(LPGPIO), .port = PORT_15, .pin = PIN_0, .alt = OMV_BOOT_ALT_GPIO, .pad = OMV_BOOT_PAD_IO }, /* MUX */
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{ .gpio = ALIF_GPIO(GPIO6), .port = PORT_6, .pin = PIN_3, .alt = OMV_BOOT_ALT_GPIO, .pad = OMV_BOOT_PAD_IO }, /* LED */
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{ .gpio = ALIF_GPIO(GPIO3), .port = PORT_3, .pin = PIN_3, .alt = OMV_BOOT_ALT_GPIO, .pad = OMV_BOOT_PAD_IO }, /* RST */
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{ .gpio = ALIF_GPIO(GPIO2), .port = PORT_2, .pin = PIN_0, .alt = OMV_BOOT_ALT_OSPI, .pad = OMV_BOOT_PAD_Dx }, /* D0 */
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{ .gpio = ALIF_GPIO(GPIO2), .port = PORT_2, .pin = PIN_1, .alt = OMV_BOOT_ALT_OSPI, .pad = OMV_BOOT_PAD_Dx }, /* D1 */
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{ .gpio = ALIF_GPIO(GPIO2), .port = PORT_2, .pin = PIN_2, .alt = OMV_BOOT_ALT_OSPI, .pad = OMV_BOOT_PAD_D2 }, /* D2 */
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{ .gpio = ALIF_GPIO(GPIO2), .port = PORT_2, .pin = PIN_3, .alt = OMV_BOOT_ALT_OSPI, .pad = OMV_BOOT_PAD_Dx }, /* D3 */
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{ .gpio = ALIF_GPIO(GPIO2), .port = PORT_2, .pin = PIN_4, .alt = OMV_BOOT_ALT_OSPI, .pad = OMV_BOOT_PAD_Dx }, /* D4 */
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{ .gpio = ALIF_GPIO(GPIO2), .port = PORT_2, .pin = PIN_5, .alt = OMV_BOOT_ALT_OSPI, .pad = OMV_BOOT_PAD_Dx }, /* D5 */
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{ .gpio = ALIF_GPIO(GPIO2), .port = PORT_2, .pin = PIN_6, .alt = OMV_BOOT_ALT_OSPI, .pad = OMV_BOOT_PAD_Dx }, /* D6 */
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{ .gpio = ALIF_GPIO(GPIO2), .port = PORT_2, .pin = PIN_7, .alt = OMV_BOOT_ALT_OSPI, .pad = OMV_BOOT_PAD_Dx }, /* D7 */
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{ .gpio = ALIF_GPIO(GPIO1), .port = PORT_1, .pin = PIN_6, .alt = OMV_BOOT_ALT_OSPI, .pad = OMV_BOOT_PAD_Dx }, /* RXD */
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{ .gpio = ALIF_GPIO(GPIO3), .port = PORT_3, .pin = PIN_0, .alt = OMV_BOOT_ALT_OSPI, .pad = OMV_BOOT_PAD_Cx }, /* CK */
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{ .gpio = ALIF_GPIO(GPIO3), .port = PORT_3, .pin = PIN_2, .alt = OMV_BOOT_ALT_OSPI, .pad = OMV_BOOT_PAD_Cx }, /* CS */
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};
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#define OMV_BOOT_PINS_COUNT (sizeof(omv_boot_pins) / sizeof(omv_boot_pins[0]))
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// Note the first MPU regions are used by startup code.
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static const partition_t OMV_BOOT_DFU_PARTITIONS[] = {
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{ .type = PTYPE_AXI_FLASH, .region= 4, .rdonly = 1, .start = 0x80000000, .limit = 0x80020000, .attr = MEMATTR_NORMAL_RA },
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{ .type = PTYPE_AXI_FLASH, .region= 5, .rdonly = 0, .start = 0x80020000, .limit = 0x80320000, .attr = MEMATTR_DEVICE_nGnRE },
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{ .type = PTYPE_AXI_FLASH, .region= 6, .rdonly = 0, .start = 0x80320000, .limit = 0x8047E000, .attr = MEMATTR_DEVICE_nGnRE },
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{ .type = PTYPE_AXI_FLASH, .region= 7, .rdonly = 0, .start = 0x8047E000, .limit = 0x8057E000, .attr = MEMATTR_DEVICE_nGnRE },
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{ .type = PTYPE_AXI_FLASH, .region= 8, .rdonly = 0, .start = 0x8057E000, .limit = 0x80580000, .attr = MEMATTR_DEVICE_nGnRE },
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{ .type = PTYPE_SPI_FLASH, .region=-1, .rdonly = 0, .start = 0x00000000, .limit = 0x00800000, .attr = 0 },
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{ .type = PTYPE_SPI_FLASH, .region=-1, .rdonly = 0, .start = 0x00800000, .limit = 0x02000000, .attr = 0 },
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{ .type = PTYPE_REC_FLASH, .region=-1, .rdonly = 0, .start = 0x00000000, .limit = 0x00001000, .attr = 0 },
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};
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#define OMV_BOOT_DFU_PARTITIONS_COUNT 8 // Must be a literal
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#define OMV_BOOT_DFU_PARTITIONS_STR "BOOT", "HP", "HE", "ROMFS1", "TOC", "RWFS", "ROMFS0", "RECOVERY"
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// Protects MRAM before jump to main firmware
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static const partition_t OMV_BOOT_XIP_PARTITIONS[] = {
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{ .type = PTYPE_XIP_FLASH, .region= 4, .rdonly = 1, .start = 0x80000000, .limit = 0x80580000, .attr = MEMATTR_NORMAL_RA },
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};
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#define OMV_BOOT_XIP_PARTITIONS_COUNT (sizeof(OMV_BOOT_XIP_PARTITIONS) / sizeof(OMV_BOOT_XIP_PARTITIONS[0]))
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#endif // __OMV_BOOTCONFIG_H__
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