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155 lines
6.9 KiB
C
Executable File
155 lines
6.9 KiB
C
Executable File
/*******************************************************************************
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**
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** File NAME: LEPTON_I2C_Reg.h
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**
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** AUTHOR: David Dart
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**
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** CREATED: 7/31/2012
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**
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** DESCRIPTION: Defines the Lepton I2C Interface for Host
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** Command and Control
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**
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** HISTORY: 7/31/2012 DWD - Initial Draft
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**
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** Copyright 2011,2012,2013,2014 FLIR Systems - Commercial
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** Vision Systems. All rights reserved.
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**
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** Proprietary - PROPRIETARY - FLIR Systems Inc..
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**
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** This document is controlled to FLIR Technology Level 2.
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** The information contained in this document pertains to a
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** dual use product Controlled for export by the Export
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** Administration Regulations (EAR). Diversion contrary to
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** US law is prohibited. US Department of Commerce
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** authorization is not required prior to export or
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** transfer to foreign persons or parties unless otherwise
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** prohibited.
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**
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** Redistribution and use in source and binary forms, with
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** or without modification, are permitted provided that the
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** following conditions are met:
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**
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** Redistributions of source code must retain the above
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** copyright notice, this list of conditions and the
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** following disclaimer.
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**
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** Redistributions in binary form must reproduce the above
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** copyright notice, this list of conditions and the
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** following disclaimer in the documentation and/or other
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** materials provided with the distribution.
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**
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** Neither the name of the FLIR Systems Corporation nor the
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** names of its contributors may be used to endorse or
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** promote products derived from this software without
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** specific prior written permission.
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**
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** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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** CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
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** WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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** PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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** COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY
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** DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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** CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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** PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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** USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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** CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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** NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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** USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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** OF SUCH DAMAGE.
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**
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*******************************************************************************/
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#ifndef _LEPTON_I2C_REG_H_
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#define _LEPTON_I2C_REG_H_
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/******************************************************************************/
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/** INCLUDE FILES **/
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/******************************************************************************/
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/******************************************************************************/
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/** EXPORTED DEFINES **/
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/******************************************************************************/
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/* DEVICE ADDRESSES
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*/
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/* The Lepton camera's device address
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*/
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#define LEP_I2C_DEVICE_ADDRESS 0x2A
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/* Block Data Buffers
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*/
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#define LEP_DATA_BUFFER_0_BASE_ADDR 0xF800
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#define LEP_DATA_BUFFER_1_BASE_ADDR 0xFC00
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/* The Lepton I2C Registers Sub-Addresses
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*/
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#define LEP_I2C_REG_BASE_ADDR 0x0000
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/* Host On Switch when camera is in stand by of off
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*/
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#define LEP_I2C_POWER_REG (LEP_I2C_REG_BASE_ADDR + 0x0000 )
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/* Host Command Interface over I2C
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*/
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#define LEP_I2C_STATUS_REG (LEP_I2C_REG_BASE_ADDR + 0x0002 )
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#define LEP_I2C_COMMAND_REG (LEP_I2C_REG_BASE_ADDR + 0x0004 )
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#define LEP_I2C_DATA_LENGTH_REG (LEP_I2C_REG_BASE_ADDR + 0x0006 )
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#define LEP_I2C_DATA_0_REG (LEP_I2C_REG_BASE_ADDR + 0x0008 )
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#define LEP_I2C_DATA_1_REG (LEP_I2C_REG_BASE_ADDR + 0x000A )
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#define LEP_I2C_DATA_2_REG (LEP_I2C_REG_BASE_ADDR + 0x000C )
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#define LEP_I2C_DATA_3_REG (LEP_I2C_REG_BASE_ADDR + 0x000E )
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#define LEP_I2C_DATA_4_REG (LEP_I2C_REG_BASE_ADDR + 0x0010 )
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#define LEP_I2C_DATA_5_REG (LEP_I2C_REG_BASE_ADDR + 0x0012 )
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#define LEP_I2C_DATA_6_REG (LEP_I2C_REG_BASE_ADDR + 0x0014 )
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#define LEP_I2C_DATA_7_REG (LEP_I2C_REG_BASE_ADDR + 0x0016 )
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#define LEP_I2C_DATA_8_REG (LEP_I2C_REG_BASE_ADDR + 0x0018 )
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#define LEP_I2C_DATA_9_REG (LEP_I2C_REG_BASE_ADDR + 0x001A )
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#define LEP_I2C_DATA_10_REG (LEP_I2C_REG_BASE_ADDR + 0x001C )
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#define LEP_I2C_DATA_11_REG (LEP_I2C_REG_BASE_ADDR + 0x001E )
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#define LEP_I2C_DATA_12_REG (LEP_I2C_REG_BASE_ADDR + 0x0020 )
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#define LEP_I2C_DATA_13_REG (LEP_I2C_REG_BASE_ADDR + 0x0022 )
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#define LEP_I2C_DATA_14_REG (LEP_I2C_REG_BASE_ADDR + 0x0024 )
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#define LEP_I2C_DATA_15_REG (LEP_I2C_REG_BASE_ADDR + 0x0026 )
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#define LEP_I2C_DATA_CRC_REG (LEP_I2C_REG_BASE_ADDR + 0x0028 )
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#define LEP_I2C_DATA_BUFFER_0 (LEP_DATA_BUFFER_0_BASE_ADDR )
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#define LEP_I2C_DATA_BUFFER_0_END (LEP_DATA_BUFFER_0_BASE_ADDR + 0x03FF )
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#define LEP_I2C_DATA_BUFFER_0_LENGTH 0x400
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#define LEP_I2C_DATA_BUFFER_1 (LEP_DATA_BUFFER_1_BASE_ADDR )
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#define LEP_I2C_DATA_BUFFER_1_END (LEP_DATA_BUFFER_1_BASE_ADDR + 0x03FF )
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#define LEP_I2C_DATA_BUFFER_1_LENGTH 0x400
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#define LEP_I2C_STATUS_BUSY_BIT_MASK 0x0001 /* Bit 0 is the Busy Bit */
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#define LEP_I2C_STATUS_BOOT_MODE_MASK 0x0002 /* Bit 1 is the boot mode */
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#define LEP_I2C_STATUS_BOOT_STAT_MASK 0x0004 /* Bit 2 is the boot status */
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/******************************************************************************/
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/** EXPORTED TYPE DEFINITIONS **/
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/******************************************************************************/
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/******************************************************************************/
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/** EXPORTED PUBLIC DATA **/
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/******************************************************************************/
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/******************************************************************************/
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/** EXPORTED PUBLIC FUNCTIONS **/
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/******************************************************************************/
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/******************************************************************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* _LEPTON_I2C_REG_H_ */
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