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https://github.com/openmv/openmv.git
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65 lines
2.7 KiB
C
65 lines
2.7 KiB
C
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/******************************************************************************
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* @file pins.h
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* @author Auto generated by Conductor Tool https://conductor.alifsemi.com/
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* @version v1.0.0
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* @date 16-10-2023
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* @brief Pin MUX and Pin Config settings for "" project with AE722F80F55D5AS
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* @bug None.
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* @note None.
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******************************************************************************/
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/*
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* Copyright (C) 2023 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* https://alifsemi.com/contact/, or visit: https://alifsemi.com/license/
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*/
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#ifndef __PINCONF_H__
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#define __PINCONF_H__
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#include <stdint.h>
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#include "pinconf.h"
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struct pinconf {
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uint8_t port;
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uint8_t pin;
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uint8_t alternate_function;
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uint8_t pad_control;
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};
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/* Pin Mux and Config Values generated by Conductor Tool */
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const struct pinconf board_pinconf[] = {
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/* P6_2 on pin D14. Functions: [0]: >>>GPIO6_2<<<, [1]: OSPI0_D2_C, [2]: UART2_CTS_A, [3]: Reserved, [4]: PDM_D1_C, [5]: UT5_T0_B, [6]: SD_D2_D, [7]: ETH_TXEN_A */
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/* Selected: GPIO6_2 */
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{PORT_6, PIN_2, PINMUX_ALTERNATE_FUNCTION_0, PADCTRL_OUTPUT_DRIVE_STRENGTH_4MA},
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/* P6_4 on pin B14. Functions: [0]: >>>GPIO6_4<<<, [1]: OSPI0_D4_C, [2]: UART2_CTS_B, [3]: Reserved, [4]: SPI1_SS0_B, [5]: UT6_T0_B, [6]: SD_D4_D, [7]: ETH_REFCLK_A */
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/* Selected: GPIO6_4 */
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{PORT_6, PIN_4, PINMUX_ALTERNATE_FUNCTION_0, PADCTRL_OUTPUT_DRIVE_STRENGTH_4MA},
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/* P6_6 on pin D16. Functions: [0]: >>>GPIO6_6<<<, [1]: OSPI0_D6_C, [2]: UART0_CTS_B, [3]: Reserved, [4]: SPI1_SS2_B, [5]: UT7_T0_B, [6]: SD_D6_D, [7]: ETH_MDC_A */
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/* Selected: GPIO6_6 */
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{PORT_6, PIN_6, PINMUX_ALTERNATE_FUNCTION_0, PADCTRL_OUTPUT_DRIVE_STRENGTH_4MA},
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/* P7_4 on pin M22 {FLEX IO}. Functions: [0]: >>>GPIO7_4<<<, [1]: Reserved, [2]: LPUART_CTS_A, [3]: LPPDM_C2_A, [4]: LPSPI_MISO_A, [5]: LPI2C_SCL_A, [6]: UT10_T0_B */
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/* Selected: GPIO7_4 */
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{PORT_7, PIN_4, PINMUX_ALTERNATE_FUNCTION_0, PADCTRL_OUTPUT_DRIVE_STRENGTH_4MA},
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/* P12_0 on pin D2. Functions: [0]: >>>GPIO12_0<<<, [1]: OSPI0_SCLK_C, [2]: AUDIO_CLK_C, [3]: I2S1_SDI_B, [4]: UT8_T0_C, [5]: CDC_D8_B */
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/* Selected: GPIO12_0 */
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{PORT_12, PIN_0, PINMUX_ALTERNATE_FUNCTION_0, PADCTRL_OUTPUT_DRIVE_STRENGTH_4MA},
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/* P12_3 on pin E7. Functions: [0]: >>>GPIO12_3<<<, [1]: OSPI0_SS0_C, [2]: UART4_DE_B, [3]: I2S1_WS_B, [4]: UT9_T1_C, [5]: CDC_D11_B */
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/* Selected: GPIO12_3 */
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{PORT_12, PIN_3, PINMUX_ALTERNATE_FUNCTION_0, PADCTRL_OUTPUT_DRIVE_STRENGTH_4MA},
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};
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#endif /* __PINCONF_H__ */
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