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94 lines
3.5 KiB
C
94 lines
3.5 KiB
C
/* Copyright (C) 2022 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* contact@alifsemi.com, or visit: https://alifsemi.com/license
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*
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*/
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#if defined (M55_HP)
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#include "M55_HP.h"
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#elif defined (M55_HE)
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#include "M55_HE.h"
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#else
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#error device not specified!
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#endif
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#include "tgu_M55.h"
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#include "tcm_partition.h"
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/*
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* Array of NS memory regions. Add new regions to this list.
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* The start and end address of the non-secure region in updated
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* from the linker scripts.
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*/
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static const struct mem_region ns_regions[] __STARTUP_RO_DATA_ATTRIBUTE = {
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{(uint32_t)&ns_region_0_start, (uint32_t)&ns_region_0_end - 1, DTCM},
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};
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/*----------------------------------------------------------------------------
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TGU setup function. Marks single memory region starting at NS_REGION_1_BASE
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and ending at NS_REGION_1_END as Non Secure in the TGU look up tables. The
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region should be in the DTCM area. Can be extended to include the ITCM region
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and multiple discontigous regions if needed.
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*----------------------------------------------------------------------------*/
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void TGU_Setup(void)
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{
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uint32_t start_block, end_block, start_lut, end_lut;
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uint32_t start_offset, end_offset, lut_val_l, lut_val_h;
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uint32_t base, itcm_blksize, dtcm_blksize, blksize;
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uint32_t i;
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/* Find out the TGU block size for ITCM */
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blksize = *((volatile unsigned int *) ITGU_CFG) & ITGU_CFG_BLKSZ;
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/* ITCM blksize is 2^(blksize + 5)*/
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itcm_blksize = 1 << (blksize + 5);
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/* Find out the TGU block size for DTCM */
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blksize = *((volatile unsigned int *) DTGU_CFG) & DTGU_CFG_BLKSZ;
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/* DTCM block size is 2^(blksize + 5) */
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dtcm_blksize = 1 << (blksize + 5);
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for (i = 0; i < (sizeof(ns_regions) / sizeof(ns_regions[0])); i++) {
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if (ns_regions[i].type == DTCM) {
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start_block = (ns_regions[i].start - DTCM_BASE) / dtcm_blksize;
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end_block = (ns_regions[i].end - DTCM_BASE) / dtcm_blksize;
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base = DTGU_BASE;
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} else {
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start_block = (ns_regions[i].start - ITCM_BASE) / itcm_blksize;
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end_block = (ns_regions[i].end - ITCM_BASE) / itcm_blksize;
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base = ITGU_BASE;
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}
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start_lut = start_block / 32;
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end_lut = end_block / 32;
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start_offset = start_block % 32;
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end_offset = end_block % 32;
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if (start_lut == end_lut) {
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/* same LUT register */
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lut_val_l = SET_BIT_RANGE(start_offset, end_offset);
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*((volatile uint32_t *) TGU_LUT(base, start_lut)) |= lut_val_l;
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} else {
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/* the range spans multiple LUT registers */
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lut_val_l = SET_BIT_RANGE(start_offset, 31);
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lut_val_h = SET_BIT_RANGE(0, end_offset);
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/* Write into the first LUT register */
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*((volatile uint32_t *) TGU_LUT(base, start_lut)) = lut_val_l;
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/* Now write to all the intermediate LUT registers */
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while (start_lut != (end_lut - 1)) {
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start_lut++;
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*((volatile uint32_t *) TGU_LUT(base, start_lut)) = 0xFFFFFFFFU;
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}
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/* Write into the last LUT register*/
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*((volatile uint32_t *) TGU_LUT(base, end_lut)) |= lut_val_h;
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}
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}
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}
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