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70 lines
2.5 KiB
C
70 lines
2.5 KiB
C
/* Copyright (C) 2023 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* contact@alifsemi.com, or visit: https://alifsemi.com/license
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*
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*/
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//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
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#ifndef DMA_CONFIG_H_
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#define DMA_CONFIG_H_
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// <o> DMA Destination Cache Control <0-7>
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// <i> State of AWCACHE[3,1:0] when the DMAC write the destination data
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// Bit [2] 0 = AWCACHE[3] is LOW
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// 1 = AWCACHE[3] is HIGH.
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// Bit [1] 0 = AWCACHE[1] is LOW
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// 1 = AWCACHE[1] is HIGH.
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// Bit [0] 0 = AWCACHE[0] is LOW
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// 1 = AWCACHE[0] is HIGH.
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// Setting AWCACHE[3,1]=0b10 violates the AXI protocol
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// <i> Default: 0x2
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#define DMA_DEST_CACHE_CTRL 0x2
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// <o> DMA Source Cache Control <0-7>
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// <i> State of ARCACHE[2:0] when the DMAC reads the source data
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// Bit [2] 0 = ARCACHE[2] is LOW
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// 1 = ARCACHE[2] is HIGH.
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// Bit [1] 0 = ARCACHE[1] is LOW
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// 1 = ARCACHE[1] is HIGH.
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// Bit [0] 0 = ARCACHE[0] is LOW
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// 1 = ARCACHE[0] is HIGH.
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// Setting ARCACHE[2:1]=0b10 violates the AXI protocol
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// <i> Default: 0x2
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#define DMA_SRC_CACHE_CTRL 0x2
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// <o> DMA Source Protection Control <0-7>
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// <i> State of ARPROT[2:0] when the DMAC reads the source data
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// Bit [2] 0 = ARPROT[2] is LOW
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// 1 = ARPROT[2] is HIGH.
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// Bit [1] 0 = ARPROT[1] is LOW
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// 1 = ARPROT[1] is HIGH.
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// Bit [0] 0 = ARPROT[0] is LOW
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// 1 = ARPROT[0] is HIGH.
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// Only DMA channels in the Secure state can program ARPROT[1] LOW
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// <i> Default: 0x0
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#define DMA_SRC_PROT_CTRL 0x0
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// <o> DMA Destination Protection Control <0-7>
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// <i> State of AWPROT[2:0] when the DMAC write the destination data
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// Bit [2] 0 = AWPROT[2] is LOW
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// 1 = AWPROT[2] is HIGH.
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// Bit [1] 0 = AWPROT[1] is LOW
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// 1 = AWPROT[1] is HIGH.
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// Bit [0] 0 = AWPROT[0] is LOW
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// 1 = AWPROT[0] is HIGH.
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// Only DMA channels in the Secure state can program AWPROT[1] LOW
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// <i> Default: 0x0
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#define DMA_DEST_PROT_CTRL 0x0
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// <o> DMA Microcode size
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// <i> Defines Default memory size(bytes) to hold the microcode for a channel
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// <i> Default: 128
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#define DMA_MICROCODE_SIZE 128
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#endif /* DMA_CONFIG_H_ */
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