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148 lines
4.2 KiB
C
148 lines
4.2 KiB
C
/* Copyright (C) 2023 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* contact@alifsemi.com, or visit: https://alifsemi.com/license
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*
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*/
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/**************************************************************************//**
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* @file evtrtr.h
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* @author Sudhir Sreedharan
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* @email sudhir@alifsemi.com
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* @version V1.0.0
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* @date 5-May-2023
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* @brief System Control Device information for Event Router
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* @bug None.
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* @Note None
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******************************************************************************/
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#ifndef EVTRTR_H
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#define EVTRTR_H
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/* Includes ------------------------------------------------------------------*/
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#include <stdint.h>
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#include <stdbool.h>
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#include "peripheral_types.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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* enum DMA_ACK_COMPLETION
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* Defines the completion of REQ-ACK with DMA
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*/
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typedef enum _DMA_ACK_COMPLETION
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{
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DMA_ACK_COMPLETION_PERIPHERAL, /**< Peripheral completes with DMA */
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DMA_ACK_COMPLETION_EVTRTR, /**< Event Router completes with DMA */
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} DMA_ACK_COMPLETION;
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#define EVTRTR_DMA_CHANNEL_MAX_Msk 0x1F /* Channel range 0-31 */
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/**
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\brief Event Router Configuration
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*/
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typedef struct _EVTRTR_CONFIG {
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/*!< Instance number */
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const uint8_t instance;
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/*!< Group number */
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const uint8_t group;
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/*!< Channel number */
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const uint8_t channel;
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/*!< Enable handshake */
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const bool enable_handshake;
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} EVTRTR_CONFIG;
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static inline void evtrtr0_enable_dma_channel(uint8_t channel,
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uint8_t group,
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DMA_ACK_COMPLETION ack_type)
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{
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volatile uint32_t *dma_ctrl_addr = &EVTRTR0->DMA_CTRL0 +
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(channel & EVTRTR_DMA_CHANNEL_MAX_Msk);
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*dma_ctrl_addr = DMA_CTRL_ENA | (DMA_CTRL_SEL_Msk & group)
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| (ack_type << DMA_CTRL_ACK_TYPE_Pos);
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}
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static inline void evtrtr0_disable_dma_channel(uint8_t channel)
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{
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volatile uint32_t *dma_ctrl_addr = &EVTRTR0->DMA_CTRL0 +
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(channel & EVTRTR_DMA_CHANNEL_MAX_Msk);
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*dma_ctrl_addr = 0;
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}
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static inline void evtrtr0_enable_dma_req(void)
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{
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EVTRTR0->DMA_REQ_CTRL |= (DMA_REQ_CTRL_CB | DMA_REQ_CTRL_CLB
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| DMA_REQ_CTRL_CS | DMA_REQ_CTRL_CLS);
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}
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static inline void evtrtr0_disable_dma_req(void)
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{
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EVTRTR0->DMA_REQ_CTRL = 0;
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}
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static inline void evtrtr0_enable_dma_handshake(uint8_t channel, uint8_t group)
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{
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volatile uint32_t *dma_ack_type_addr = &EVTRTR0->DMA_ACK_TYPE0 +
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(DMA_CTRL_SEL_Msk & group);
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__disable_irq();
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*dma_ack_type_addr |= (1 << (channel & EVTRTR_DMA_CHANNEL_MAX_Msk));
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__enable_irq();
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}
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static inline void evtrtr0_disable_dma_handshake(uint8_t channel, uint8_t group)
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{
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volatile uint32_t *dma_ack_type_addr = &EVTRTR0->DMA_ACK_TYPE0 +
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(DMA_CTRL_SEL_Msk & group);
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__disable_irq();
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*dma_ack_type_addr &= ~(1 << (channel & EVTRTR_DMA_CHANNEL_MAX_Msk));
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__enable_irq();
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}
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static inline void evtrtrlocal_enable_dma_channel(uint8_t channel,
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DMA_ACK_COMPLETION ack_type)
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{
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volatile uint32_t *dma_ctrl_addr = &EVTRTRLOCAL->DMA_CTRL0 +
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(channel & EVTRTR_DMA_CHANNEL_MAX_Msk);
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*dma_ctrl_addr = DMA_CTRL_ENA | (ack_type << DMA_CTRL_ACK_TYPE_Pos);
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}
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static inline void evtrtrlocal_disable_dma_channel(uint8_t channel)
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{
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volatile uint32_t *dma_ctrl_addr = &EVTRTRLOCAL->DMA_CTRL0 +
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(channel & EVTRTR_DMA_CHANNEL_MAX_Msk);
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*dma_ctrl_addr = 0;
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}
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static inline void evtrtrlocal_enable_dma_req(void)
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{
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EVTRTRLOCAL->DMA_REQ_CTRL |= (DMA_REQ_CTRL_CB | DMA_REQ_CTRL_CLB
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| DMA_REQ_CTRL_CS | DMA_REQ_CTRL_CLS);
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}
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static inline void evtrtrlocal_disable_dma_req(void)
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{
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EVTRTRLOCAL->DMA_REQ_CTRL = 0;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* EVTRTR_H */
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