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307 lines
16 KiB
C
307 lines
16 KiB
C
/**
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******************************************************************************
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* @file ll_aton_osal.h
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* @author SRA Artificial Intelligence & Embedded Architectures
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* @brief Header file for defining an abstraction of RTOS differences
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2024 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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#ifndef __LL_ATON_OSAL_H
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#define __LL_ATON_OSAL_H
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/*** Platform choice ***/
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#include "ll_aton_config.h"
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/*** Platform dependent definitions & includes ***/
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/* Bare metal Cortex-M NCSIM simulator OSAL*/
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#if (LL_ATON_OSAL == LL_ATON_OSAL_BARE_METAL)
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/* Macros for (de-)initialization of OSAL layer */
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#define LL_ATON_OSAL_INIT()
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#define LL_ATON_OSAL_DEINIT()
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/* Wait for / signal event from ATON runtime */
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#define LL_ATON_OSAL_WFE() __WFE()
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#define LL_ATON_OSAL_SIGNAL_EVENT()
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#elif (LL_ATON_OSAL == LL_ATON_OSAL_LINUX_UIO)
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#include "ll_aton_osal_linux_uio.h"
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/* Macros for (de-)initialization of OSAL layer */
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#define LL_ATON_OSAL_INIT() linux_init()
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#define LL_ATON_OSAL_DEINIT() linux_uninit()
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/* Wait for / signal event from ATON runtime */
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#define LL_ATON_OSAL_WFE() linux_wfe()
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#define LL_ATON_OSAL_SIGNAL_EVENT()
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#define LL_ATON_OSAL_INSTALL_IRQ(irq_aton_line_nr, handler) linux_install_irq(irq_aton_line_nr, handler)
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#define LL_ATON_OSAL_REMOVE_IRQ(irq_aton_line_nr) linux_install_irq(irq_aton_line_nr, NULL)
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#define LL_ATON_OSAL_ENABLE_IRQ(irq_aton_line_nr) linux_enable_irq(irq_aton_line_nr, true)
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#define LL_ATON_OSAL_DISABLE_IRQ(irq_aton_line_nr) linux_enable_irq(irq_aton_line_nr, false)
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/* Enter/exit a critical section for the ATON runtime thread/task */
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#define LL_ATON_OSAL_ENTER_CS() /* NVIC_DisableIRQ(CDNN0_IRQn) */
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#define LL_ATON_OSAL_EXIT_CS() /* NVIC_EnableIRQ(CDNN0_IRQn) */
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/* Data synchronization barrier */
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#ifdef __ARM_ARCH
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#include <cmsis_compiler.h>
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#define LL_ATON_OSAL_DSB() __DSB()
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#else
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#include <immintrin.h>
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#define LL_ATON_OSAL_DSB() _mm_lfence()
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#endif
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#elif (LL_ATON_OSAL == LL_ATON_OSAL_LINUX_BW)
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#include "ll_aton_osal_linux_bw.h"
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/* Macros for (de-)initialization of OSAL layer */
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#define LL_ATON_OSAL_INIT() bw_init()
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#define LL_ATON_OSAL_DEINIT() bw_uninit()
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/* Wait for / signal event from ATON runtime */
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#define LL_ATON_OSAL_WFE() bw_wfe()
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#define LL_ATON_OSAL_SIGNAL_EVENT() bw_post_event()
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#define LL_ATON_OSAL_INSTALL_IRQ(irq_aton_line_nr, handler) bw_install_irq(irq_aton_line_nr, handler)
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#define LL_ATON_OSAL_REMOVE_IRQ(irq_aton_line_nr) bw_uninstall_irq(irq_aton_line_nr)
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#define LL_ATON_OSAL_ENABLE_IRQ(irq_aton_line_nr)
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#define LL_ATON_OSAL_DISABLE_IRQ(irq_aton_line_nr)
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#define LL_ATON_OSAL_ENTER_CS() bw_enter_cs()
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#define LL_ATON_OSAL_EXIT_CS() bw_exit_cs()
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#include <immintrin.h>
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#define LL_ATON_OSAL_DSB() _mm_lfence()
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#elif (LL_ATON_OSAL == LL_ATON_OSAL_THREADX)
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#include "ll_aton_osal_threadx.h"
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#define LL_ATON_OSAL_INIT() aton_osal_threadx_init()
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#define LL_ATON_OSAL_DEINIT() aton_osal_threadx_deinit()
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/* Wait for / signal event from ATON runtime */
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#define LL_ATON_OSAL_WFE() aton_osal_threadx_wfe()
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#define LL_ATON_OSAL_SIGNAL_EVENT() aton_osal_threadx_signal_event()
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/* Locks */
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#if APP_HAS_PARALLEL_NETWORKS
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#ifdef LL_ATON_OSAL_TX_OLD
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#define LL_ATON_OSAL_LOCK_ATON() aton_osal_threadx_pb_lock()
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#define LL_ATON_OSAL_UNLOCK_ATON() aton_osal_threadx_pb_unlock()
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#else // LL_ATON_OSAL_TX_OLD
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#define LL_ATON_OSAL_LOCK_ATON() aton_osal_threadx_dao_lock()
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#define LL_ATON_OSAL_UNLOCK_ATON() aton_osal_threadx_dao_unlock()
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#endif // LL_ATON_OSAL_TX_OLD
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#endif // APP_HAS_PARALLEL_NETWORKS
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#define LL_ATON_OSAL_LOCK_NPU_CACHE() aton_osal_threadx_lock()
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#define LL_ATON_OSAL_UNLOCK_NPU_CACHE() aton_osal_threadx_unlock()
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#elif (LL_ATON_OSAL == LL_ATON_OSAL_FREERTOS)
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#include "ll_aton_osal_freertos.h"
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#define LL_ATON_OSAL_INIT() aton_osal_freertos_init()
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#define LL_ATON_OSAL_DEINIT() aton_osal_freertos_deinit()
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/* Wait for / signal event from ATON runtime */
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#define LL_ATON_OSAL_WFE() aton_osal_freertos_wfe()
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#define LL_ATON_OSAL_SIGNAL_EVENT() aton_osal_freertos_signal_event()
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/* Locks */
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#if APP_HAS_PARALLEL_NETWORKS
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#define LL_ATON_OSAL_LOCK_ATON() aton_osal_freertos_dao_lock()
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#define LL_ATON_OSAL_UNLOCK_ATON() aton_osal_freertos_dao_unlock()
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#endif // APP_HAS_PARALLEL_NETWORKS
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#define LL_ATON_OSAL_LOCK_NPU_CACHE() aton_osal_freertos_lock()
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#define LL_ATON_OSAL_UNLOCK_NPU_CACHE() aton_osal_freertos_unlock()
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#elif (LL_ATON_OSAL == LL_ATON_OSAL_ZEPHYR)
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#include "ll_aton_osal_zephyr.h"
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/* Init & De-Initialization */
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#define LL_ATON_OSAL_INIT() aton_osal_zephyr_init()
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#define LL_ATON_OSAL_DEINIT() aton_osal_zephyr_deinit()
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/* IRQ handling */
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#define LL_ATON_OSAL_INSTALL_IRQ(irq_aton_line_nr, handler) aton_osal_zephyr_install_irq(irq_aton_line_nr, handler)
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#define LL_ATON_OSAL_REMOVE_IRQ(irq_aton_line_nr) aton_osal_zephyr_uninstall_irq(irq_aton_line_nr)
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#define LL_ATON_OSAL_ENABLE_IRQ(irq_aton_line_nr) aton_osal_zephyr_enable_irq(irq_aton_line_nr)
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#define LL_ATON_OSAL_DISABLE_IRQ(irq_aton_line_nr) aton_osal_zephyr_disable_irq(irq_aton_line_nr)
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#define LL_ATON_OSAL_ENTER_CS() aton_osal_zephyr_enter_cs()
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#define LL_ATON_OSAL_EXIT_CS() aton_osal_zephyr_exit_cs()
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/* Wait for / signal event from ATON runtime */
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#define LL_ATON_OSAL_WFE() aton_osal_zephyr_wfe()
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#define LL_ATON_OSAL_SIGNAL_EVENT() aton_osal_zephyr_signal_event()
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/* Locks */
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#if APP_HAS_PARALLEL_NETWORKS
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#define LL_ATON_OSAL_LOCK_ATON() aton_osal_zephyr_dao_lock()
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#define LL_ATON_OSAL_UNLOCK_ATON() aton_osal_zephyr_dao_unlock()
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#endif // APP_HAS_PARALLEL_NETWORKS
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#define LL_ATON_OSAL_LOCK_NPU_CACHE() aton_osal_zephyr_lock()
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#define LL_ATON_OSAL_UNLOCK_NPU_CACHE() aton_osal_zephyr_unlock()
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#elif (LL_ATON_OSAL == LL_ATON_OSAL_USER_IMPL)
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#include "ll_aton_osal_user_impl.h" /* file to be provided together with an implemetation of the custom OSAL by the user */
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#else
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#error No target OSAL is specified. Please define macro `LL_ATON_OSAL`
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#endif
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/*** Default implementations ***/
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/* Handling of ATON IRQ */
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#ifndef LL_ATON_OSAL_INSTALL_IRQ
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#define LL_ATON_OSAL_INSTALL_IRQ(irq_aton_line_nr, handler)
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#endif // LL_ATON_OSAL_INSTALL_IRQ
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#ifndef LL_ATON_OSAL_REMOVE_IRQ
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#define LL_ATON_OSAL_REMOVE_IRQ(irq_aton_line_nr)
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#endif // LL_ATON_OSAL_REMOVE_IRQ
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#ifndef LL_ATON_OSAL_ENABLE_IRQ
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#define LL_ATON_OSAL_ENABLE_IRQ(irq_aton_line_nr) \
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do \
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{ \
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switch (irq_aton_line_nr) \
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{ \
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case 0: \
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NVIC_EnableIRQ(CDNN0_IRQn); \
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break; \
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case 1: \
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NVIC_EnableIRQ(CDNN1_IRQn); \
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break; \
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case 2: \
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NVIC_EnableIRQ(CDNN2_IRQn); \
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break; \
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case 3: \
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NVIC_EnableIRQ(CDNN3_IRQn); \
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break; \
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default: \
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assert(0); \
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break; \
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} \
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} while (0)
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#endif // LL_ATON_OSAL_ENABLE_IRQ
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#ifndef LL_ATON_OSAL_DISABLE_IRQ
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#define LL_ATON_OSAL_DISABLE_IRQ(irq_aton_line_nr) \
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do \
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{ \
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switch (irq_aton_line_nr) \
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{ \
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case 0: \
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NVIC_DisableIRQ(CDNN0_IRQn); \
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break; \
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case 1: \
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NVIC_DisableIRQ(CDNN1_IRQn); \
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break; \
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case 2: \
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NVIC_DisableIRQ(CDNN2_IRQn); \
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break; \
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case 3: \
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NVIC_DisableIRQ(CDNN3_IRQn); \
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break; \
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default: \
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assert(0); \
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break; \
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} \
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} while (0)
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#endif // LL_ATON_OSAL_DISABLE_IRQ
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#ifndef LL_ATON_OSAL_SET_PRIORITY
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#define LL_ATON_OSAL_SET_PRIORITY(irq_aton_line_nr, prio) \
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do \
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{ \
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switch (irq_aton_line_nr) \
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{ \
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case 0: \
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NVIC_SetPriority(CDNN0_IRQn, prio); \
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break; \
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case 1: \
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NVIC_SetPriority(CDNN1_IRQn, prio); \
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break; \
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case 2: \
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NVIC_SetPriority(CDNN2_IRQn, prio); \
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break; \
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case 3: \
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NVIC_SetPriority(CDNN3_IRQn, prio); \
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break; \
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default: \
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assert(0); \
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break; \
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} \
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} while (0)
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#endif // LL_ATON_OSAL_SET_PRIORITY
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/* Enter/exit a critical section for the ATON runtime thread/task */
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// NOTE: here we need to block also execution of IRQ handler
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#ifndef LL_ATON_OSAL_ENTER_CS
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#define LL_ATON_OSAL_ENTER_CS() NVIC_DisableIRQ(ATON_STD_IRQn)
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#endif // LL_ATON_OSAL_ENTER_CS
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#ifndef LL_ATON_OSAL_EXIT_CS
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#define LL_ATON_OSAL_EXIT_CS() NVIC_EnableIRQ(ATON_STD_IRQn)
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#endif // LL_ATON_OSAL_EXIT_CS
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/* Data synchronization barrier */
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#ifndef LL_ATON_OSAL_DSB
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#define LL_ATON_OSAL_DSB() __DSB()
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#endif // LL_ATON_OSAL_DSB
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/** Locking mechanisms for thread-safe ATON runtime **/
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/* ATON IP */
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#ifndef LL_ATON_OSAL_LOCK_ATON
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#define LL_ATON_OSAL_LOCK_ATON()
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#endif // !LL_ATON_OSAL_LOCK_ATON
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#ifndef LL_ATON_OSAL_UNLOCK_ATON
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#define LL_ATON_OSAL_UNLOCK_ATON()
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#endif // !LL_ATON_OSAL_UNLOCK_ATON
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/* NPU Cache Lock */
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// NOTE: Needs to be implemented only if NPU cache maintenance operations cannot be performed in parallel
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// NOTE: This lock may be taken while the ATON IP lock (aka `LL_ATON_OSAL_LOCK_ATON`) is held.
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// Therfore, either use two independent locking mechanisms for them or one re-entrant mechanism
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#ifndef LL_ATON_OSAL_LOCK_NPU_CACHE
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#define LL_ATON_OSAL_LOCK_NPU_CACHE()
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#define LL_HAS_NO_ATON_OSAL_LOCK_NPU_CACHE
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#endif // !LL_ATON_OSAL_LOCK_NPU_CACHE
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#ifndef LL_ATON_OSAL_UNLOCK_NPU_CACHE
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#define LL_ATON_OSAL_UNLOCK_NPU_CACHE()
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#endif // !LL_ATON_OSAL_UNLOCK_NPU_CACHE
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/* MCU Cache Lock */
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// NOTE: Needs to be implemented only if MCU cache maintenance operations cannot be performed in parallel
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// NOTE: This lock may be taken while the ATON IP lock (aka `LL_ATON_OSAL_LOCK_ATON`) is held.
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// Therfore, either use two independent locking mechanisms for them or one re-entrant mechanism
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#ifndef LL_ATON_OSAL_LOCK_MCU_CACHE
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#define LL_ATON_OSAL_LOCK_MCU_CACHE()
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#define LL_HAS_NO_ATON_OSAL_LOCK_MCU_CACHE
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#endif // !LL_ATON_OSAL_LOCK_MCU_CACHE
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#ifndef LL_ATON_OSAL_UNLOCK_MCU_CACHE
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#define LL_ATON_OSAL_UNLOCK_MCU_CACHE()
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#endif // !LL_ATON_OSAL_UNLOCK_MCU_CACHE
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#endif // __LL_ATON_OSAL_H
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