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264 lines
7.8 KiB
C
264 lines
7.8 KiB
C
/* Copyright (C) 2022 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code is permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* contact@alifsemi.com, or visit: https://alifsemi.com/license
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*
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*/
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/**************************************************************************//**
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* @file app_issi_flash.c
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* @author Khushboo Singh
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* @email khushboo.singh@alifsemi.com
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* @version V1.0.0
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* @date 05-Dec-2022
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* @brief Application to set up flash in XIP mode and jump to the flash
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* image address.
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* @bug None.
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* @Note None
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******************************************************************************/
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#include "RTE_Components.h"
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#include CMSIS_device_header
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#include "setup_flash_xip.h"
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#include "ospi_xip_user.h"
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#include "pinconf.h"
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#include "Driver_GPIO.h"
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#if OSPI_XIP_ENABLE_AES_DECRYPTION
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#include "se_services_port.h"
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#include "services_lib_api.h"
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#include "ospi_xip_aes_key.h"
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#endif
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#include "system_utils.h"
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#define OSPI_RESET_PORT 15
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#define OSPI_RESET_PIN 7
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extern ARM_DRIVER_GPIO ARM_Driver_GPIO_(OSPI_RESET_PORT);
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ARM_DRIVER_GPIO *GPIODrv = &ARM_Driver_GPIO_(OSPI_RESET_PORT);
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typedef void (*pfun) (void);
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static pfun EntryPoint;
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/**
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\fn static int32_t setup_PinMUX(void)
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\brief Set up PinMUX and PinPAD
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\param[in] none
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\return -1: If any error
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*/
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static int32_t setup_pinmux(void)
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{
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int32_t ret;
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#if OSPI_XIP_INSTANCE == OSPI0
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ret = pinconf_set(OSPI0_D0_PORT, OSPI0_D0_PIN, OSPI0_D0_PIN_FUNCTION, PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI0_D1_PORT, OSPI0_D1_PIN, OSPI0_D1_PIN_FUNCTION, PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI0_D2_PORT, OSPI0_D2_PIN, OSPI0_D2_PIN_FUNCTION, PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI0_D3_PORT, OSPI0_D3_PIN, OSPI0_D3_PIN_FUNCTION, PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI0_D4_PORT, OSPI0_D4_PIN, OSPI0_D4_PIN_FUNCTION, PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI0_D5_PORT, OSPI0_D5_PIN, OSPI0_D5_PIN_FUNCTION, PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI0_D6_PORT, OSPI0_D6_PIN, OSPI0_D6_PIN_FUNCTION, PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI0_D7_PORT, OSPI0_D7_PIN, OSPI0_D7_PIN_FUNCTION, PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI0_RXDS_PORT, OSPI0_RXDS_PIN, OSPI0_RXDS_PIN_FUNCTION, PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI0_SCLK_PORT, OSPI0_SCLK_PIN, OSPI0_SCLK_PIN_FUNCTION, 0);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI0_CS_PORT, OSPI0_CS_PIN, OSPI0_CS_PIN_FUNCTION, 0);
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if (ret)
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return -1;
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#else
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ret = pinconf_set(OSPI1_D0_PORT, OSPI1_D0_PIN, OSPI1_D0_PIN_FUNCTION,
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PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST | PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI1_D1_PORT, OSPI1_D1_PIN, OSPI1_D1_PIN_FUNCTION,
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PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST | PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI1_D2_PORT, OSPI1_D2_PIN, OSPI1_D2_PIN_FUNCTION,
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PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST | PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI1_D3_PORT, OSPI1_D3_PIN, OSPI1_D3_PIN_FUNCTION,
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PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST | PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI1_D4_PORT, OSPI1_D4_PIN, OSPI1_D4_PIN_FUNCTION,
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PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST | PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI1_D5_PORT, OSPI1_D5_PIN, OSPI1_D5_PIN_FUNCTION,
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PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST | PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI1_D6_PORT, OSPI1_D6_PIN, OSPI1_D6_PIN_FUNCTION,
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PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST | PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI1_D7_PORT, OSPI1_D7_PIN, OSPI1_D7_PIN_FUNCTION,
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PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST | PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI1_RXDS_PORT, OSPI1_RXDS_PIN, OSPI1_RXDS_PIN_FUNCTION,
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PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST | PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI1_SCLK_PORT, OSPI1_SCLK_PIN, OSPI1_SCLK_PIN_FUNCTION,
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PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI1_CS_PORT, OSPI1_CS_PIN, OSPI1_CS_PIN_FUNCTION, PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA);
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if (ret)
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return -1;
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/* P5_6 is needed to support proper alt function selection of P10_7 */
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ret = pinconf_set(PORT_5, PIN_6, OSPI1_RXDS_PIN_FUNCTION,
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PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA | PADCTRL_SLEW_RATE_FAST | PADCTRL_READ_ENABLE);
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if (ret)
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return -1;
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ret = pinconf_set(OSPI1_SCLKN_PORT, OSPI1_SCLKN_PIN, OSPI1_SCLKN_PIN_FUNCTION,
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PADCTRL_OUTPUT_DRIVE_STRENGTH_12MA);
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if (ret)
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return -1;
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#endif
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ret = GPIODrv->Initialize(OSPI_RESET_PIN, NULL);
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if (ret != ARM_DRIVER_OK)
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return -1;
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ret = GPIODrv->PowerControl(OSPI_RESET_PIN, ARM_POWER_FULL);
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if (ret != ARM_DRIVER_OK)
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return -1;
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ret = GPIODrv->SetDirection(OSPI_RESET_PIN, GPIO_PIN_DIRECTION_OUTPUT);
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if (ret != ARM_DRIVER_OK)
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return -1;
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ret = GPIODrv->SetValue(OSPI_RESET_PIN, GPIO_PIN_OUTPUT_STATE_LOW);
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if (ret != ARM_DRIVER_OK)
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return -1;
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ret = GPIODrv->SetValue(OSPI_RESET_PIN, GPIO_PIN_OUTPUT_STATE_HIGH);
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if (ret != ARM_DRIVER_OK)
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return -1;
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return 0;
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}
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/**
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\fn int main ()
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\brief Main Function
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\param[in] none
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\return 0 : Success
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*/
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int main ()
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{
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#if OSPI_XIP_SKIP_INITIALIZATION == 0
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int32_t ret;
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ret = setup_pinmux();
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if (ret)
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{
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while(1);
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}
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#if OSPI_XIP_ENABLE_AES_DECRYPTION
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uint32_t se_ret = SERVICES_REQ_SUCCESS, error_code, command;
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uint8_t key[AES_128_KEY_SIZE];
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/* Initialize the SE services */
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se_services_port_init();
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/* Prepare the user provided key for SE service request */
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for (int i = 0; i < AES_128_KEY_SIZE; i++)
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{
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key[i] = ospi_aes_user_key[AES_128_KEY_SIZE - 1 - i];
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}
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#if OSPI_XIP_INSTANCE == OSPI0
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command = OSPI_WRITE_EXTERNAL_KEY_OSPI0;
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#else
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command = OSPI_WRITE_EXTERNAL_KEY_OSPI1;
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#endif
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se_ret = SERVICES_application_ospi_write_key(se_services_s_handle, command, key, &error_code);
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if (se_ret != SERVICES_REQ_SUCCESS || error_code != 0)
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{
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while(1);
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}
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#endif
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ret = setup_flash_xip();
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if (ret)
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{
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while(1);
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}
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#else
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/*
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* Wait for the other core to finish setting up OSPI XIP and AES.
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* This mechanism can be replaced by another 'wait and notify'
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* synchronization mechanism between the cores as per the application
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* requirements.
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*/
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while (flash_xip_enabled() == false)
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{
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sys_busy_loop_us(1000);
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}
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#endif
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/* Read the Reset_Handler address from the vector table of the image in OSPI */
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EntryPoint = (pfun)(*(__IO uint32_t *)(OSPI_XIP_IMAGE_ADDRESS + 4));
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/* Jump to the Reset_Handler */
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EntryPoint();
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return 0;
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}
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