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157 lines
6.2 KiB
C
157 lines
6.2 KiB
C
/*
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* Copyright (c) 2019, Nordic Semiconductor ASA
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef NRF_FPU_H__
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#define NRF_FPU_H__
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#include <nrfx.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @defgroup nrf_fpu_hal FPU HAL
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* @{
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* @ingroup nrf_fpu
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* @brief Hardware access layer (HAL) for managing the Floating Point Unit configuration.
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*/
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/** @brief FPU events. */
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typedef enum
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{
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NRF_FPU_EVENT_INVALIDOPERATION = offsetof(NRF_FPU_Type, EVENTS_INVALIDOPERATION), /**< An FPUIOC exception triggered by an invalid operation has occurred in the FPU. */
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NRF_FPU_EVENT_DIVIDEBYZERO = offsetof(NRF_FPU_Type, EVENTS_DIVIDEBYZERO), /**< An FPUDZC exception triggered by a floating-point divide-by-zero operation has occurred in the FPU. */
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NRF_FPU_EVENT_OVERFLOW = offsetof(NRF_FPU_Type, EVENTS_OVERFLOW), /**< An FPUOFC exception triggered by a floating-point overflow has occurred in the FPU. */
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NRF_FPU_EVENT_UNDERFLOW = offsetof(NRF_FPU_Type, EVENTS_UNDERFLOW), /**< An FPUUFC exception triggered by a floating-point underflow has occurred in the FPU. */
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NRF_FPU_EVENT_INEXACT = offsetof(NRF_FPU_Type, EVENTS_INEXACT), /**< An FPUIXC exception triggered by an inexact floating-point operation has occurred in the FPU. */
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NRF_FPU_EVENT_DENORMALINPUT = offsetof(NRF_FPU_Type, EVENTS_DENORMALINPUT), /**< An FPUIDC exception triggered by a denormal floating-point input has occurred in the FPU. */
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} nrf_fpu_event_t;
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/** @brief FPU interrupts. */
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typedef enum
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{
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NRF_FPU_INT_INVALIDOPERATION = FPU_INTEN_INVALIDOPERATION_Msk, /**< Interrupt on event INVALIDOPERATION. */
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NRF_FPU_INT_DIVIDEBYZERO = FPU_INTEN_DIVIDEBYZERO_Msk, /**< Interrupt on event DIVIDEBYZERO. */
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NRF_FPU_INT_OVERFLOW = FPU_INTEN_OVERFLOW_Msk, /**< Interrupt on event OVERFLOW. */
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NRF_FPU_INT_UNDERFLOW = FPU_INTEN_UNDERFLOW_Msk, /**< Interrupt on event UNDERFLOW. */
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NRF_FPU_INT_INEXACT = FPU_INTEN_INEXACT_Msk, /**< Interrupt on event INEXACT. */
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NRF_FPU_INT_DENORMALINPUT = FPU_INTEN_DENORMALINPUT_Msk, /**< Interrupt on event DENORMALINPUT. */
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} nrf_fpu_int_mask_t;
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/**
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* @brief Function for clearing the specified FPU event.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] event Event to be cleared.
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*/
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NRF_STATIC_INLINE void nrf_fpu_event_clear(NRF_FPU_Type * p_reg,
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nrf_fpu_event_t event);
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/**
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* @brief Function for retrieving the state of the FPU event.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] event Event to be checked.
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*
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* @retval true The event has been generated.
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* @retval false The event has not been generated.
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*/
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NRF_STATIC_INLINE bool nrf_fpu_event_check(NRF_FPU_Type const * p_reg,
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nrf_fpu_event_t event);
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/**
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* @brief Function for enabling specified interrupts.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] mask Mask of interrupts to be enabled.
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*/
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NRF_STATIC_INLINE void nrf_fpu_int_enable(NRF_FPU_Type * p_reg, uint32_t mask);
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/**
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* @brief Function for disabling specified interrupts.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] mask Mask of interrupts to be disabled.
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*/
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NRF_STATIC_INLINE void nrf_fpu_int_disable(NRF_FPU_Type * p_reg, uint32_t mask);
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/**
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* @brief Function for checking if the specified interrupts are enabled.
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*
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* @param[in] p_reg Pointer to the structure of registers of the peripheral.
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* @param[in] mask Mask of interrupts to be checked.
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*
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* @return Mask of enabled interrupts.
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*/
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NRF_STATIC_INLINE uint32_t nrf_fpu_int_enable_check(NRF_FPU_Type const * p_reg, uint32_t mask);
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#ifndef NRF_DECLARE_ONLY
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NRF_STATIC_INLINE void nrf_fpu_event_clear(NRF_FPU_Type * p_reg,
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nrf_fpu_event_t event)
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{
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*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
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}
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NRF_STATIC_INLINE bool nrf_fpu_event_check(NRF_FPU_Type const * p_reg,
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nrf_fpu_event_t event)
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{
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return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
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}
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NRF_STATIC_INLINE void nrf_fpu_int_enable(NRF_FPU_Type * p_reg, uint32_t mask)
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{
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p_reg->INTENSET = mask;
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}
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NRF_STATIC_INLINE void nrf_fpu_int_disable(NRF_FPU_Type * p_reg, uint32_t mask)
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{
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p_reg->INTENCLR = mask;
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}
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NRF_STATIC_INLINE uint32_t nrf_fpu_int_enable_check(NRF_FPU_Type const * p_reg, uint32_t mask)
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{
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return p_reg->INTENSET & mask;
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}
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#endif // NRF_DECLARE_ONLY
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif // NRF_FPU_H__
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