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146 lines
5.1 KiB
C
146 lines
5.1 KiB
C
/*
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* Copyright (C) 2023-2024 OpenMV, LLC.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Any redistribution, use, or modification in source or binary form
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* is done solely for personal benefit and not for any commercial
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* purpose or for monetary gain. For commercial licensing options,
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* please contact openmv@openmv.io
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*
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* THIS SOFTWARE IS PROVIDED BY THE LICENSOR AND COPYRIGHT OWNER "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE LICENSOR OR COPYRIGHT
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* OWNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* OpenMV MIMXRT port abstraction layer.
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*/
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#ifndef __OMV_PORTCONFIG_H__
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#define __OMV_PORTCONFIG_H__
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#include <stdlib.h>
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#include "clk.h"
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#include "i2c.h"
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#include "i3c.h"
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#include "spi.h"
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#include "cpi.h"
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#include "gpio.h"
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#include "pinconf.h"
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#include PINS_AF_H
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#include CMSIS_MCU_H
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// *INDENT-OFF*
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// omv_gpio_t definitions
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// GPIO speeds.
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#define OMV_GPIO_SPEED_LOW ((1 << 8) | 0)
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#define OMV_GPIO_SPEED_MED ((2 << 8) | 0)
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#define OMV_GPIO_SPEED_HIGH ((3 << 8) | PADCTRL_SLEW_RATE_FAST)
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#define OMV_GPIO_SPEED_MAX ((4 << 8) | PADCTRL_SLEW_RATE_FAST)
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// GPIO pull.
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#define OMV_GPIO_PULL_NONE ((1 << 8) | PADCTRL_DRIVER_DISABLED_HIGH_Z)
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#define OMV_GPIO_PULL_UP ((2 << 8) | PADCTRL_DRIVER_DISABLED_PULL_UP)
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#define OMV_GPIO_PULL_DOWN ((3 << 8) | PADCTRL_DRIVER_DISABLED_PULL_DOWN)
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// GPIO modes.
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#define OMV_GPIO_MODE_INPUT ((1 << 8) | PADCTRL_SCHMITT_TRIGGER_ENABLE | PADCTRL_READ_ENABLE)
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#define OMV_GPIO_MODE_OUTPUT ((2 << 8) | PADCTRL_OUTPUT_DRIVE_STRENGTH_8MA)
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#define OMV_GPIO_MODE_OUTPUT_OD ((3 << 8) | PADCTRL_OUTPUT_DRIVE_STRENGTH_8MA | PADCTRL_DRIVER_OPEN_DRAIN)
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#define OMV_GPIO_MODE_ALT ((4 << 8)) // No settings for AF modes.
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#define OMV_GPIO_MODE_ALT_OD ((5 << 8)) // No settings for AF modes.
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// GPIO IT modes.
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#define OMV_GPIO_MODE_IT_FALL ((6 << 8) | PADCTRL_SCHMITT_TRIGGER_ENABLE | PADCTRL_READ_ENABLE)
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#define OMV_GPIO_MODE_IT_RISE ((7 << 8) | PADCTRL_SCHMITT_TRIGGER_ENABLE | PADCTRL_READ_ENABLE)
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#define OMV_GPIO_MODE_IT_BOTH ((8 << 8) | PADCTRL_SCHMITT_TRIGGER_ENABLE | PADCTRL_READ_ENABLE)
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// *INDENT-OFF*
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typedef struct {
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uint8_t port;
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uint8_t pin;
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uint8_t af;
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uint8_t ren; // Receiver enable.
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} alif_gpio_t;
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typedef const alif_gpio_t *omv_gpio_t;
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// For board config files.
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#if OMV_GPIO_DEFINE_PINS
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#define OMV_GPIO_DEFINE(name, port, pin, af, ren) \
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const alif_gpio_t omv_pin_##name = {port, pin, port##_##pin##_AF_##af, ren};
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#else
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#define OMV_GPIO_DEFINE(name, port, pin, af, ren) \
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extern const alif_gpio_t omv_pin_##name;
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#endif
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#include "omv_pins.h"
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// omv_i2c_t definitions
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typedef void *omv_i2c_dev_t;
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#define OMV_I2C_PORT_BITS \
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struct { \
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bool is_i3c; \
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size_t cw_size; \
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uint8_t cw_buf[256]; \
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};
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#define OMV_I2C_MAX_8BIT_XFER (65536U - 16U)
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#define OMV_I2C_MAX_16BIT_XFER (65536U - 8U)
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// omv_spi_t definitions
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#define OMV_SPI_MODE_SLAVE (0)
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#define OMV_SPI_MODE_MASTER (1)
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#define OMV_SPI_LSB_FIRST (0)
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#define OMV_SPI_MSB_FIRST (1)
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#define OMV_SPI_BUS_TX (1 << 0)
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#define OMV_SPI_BUS_RX (1 << 1)
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#define OMV_SPI_BUS_TX_RX (OMV_SPI_BUS_TX | OMV_SPI_BUS_RX)
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#define OMV_SPI_CPOL_LOW (0)
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#define OMV_SPI_CPOL_HIGH (1)
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#define OMV_SPI_CPHA_1EDGE (0)
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#define OMV_SPI_CPHA_2EDGE (1)
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#define OMV_SPI_NSS_LOW (0)
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#define OMV_SPI_NSS_HIGH (1)
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#define OMV_SPI_MAX_8BIT_XFER (32768U - 32U)
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#define OMV_SPI_MAX_16BIT_XFER (32768U - 16U)
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#define OMV_SPI_MAX_TIMEOUT (0xFFFFFFFF)
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#define OMV_SPI_NO_DMA (1)
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#define OMV_SPI_PORT_BITS \
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struct { \
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SPI_Type *inst; \
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bool is_lp; \
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uint32_t spi_mode; \
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uint32_t bus_mode; \
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uint8_t datasize; \
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};
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#define OMV_CSI_PORT_BITS \
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struct { \
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CPI_Type *base; \
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};
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#endif // __OMV_PORTCONFIG_H__
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