Migrate to KiCad 6 (#96)

- Updated view_base and view_screen KiCad projects to v6 files
  - Updated footprints to v6 versions
  - Fixed all DRC errors and most warnings
- Updated CI
  - Run on Ubuntu 22.04 runner
  - Updated KiBot and KiKit versions
  - Use KiBot for 3d rendering now instead of custom scripts
  - Switched to using KiCad text variables for replacement rather than raw text find&replace
- Misc design updates
  - Exposed bottom-side thermal pad underneath TMC6300 to make it easier to possibly hand-solder
  - Separated GND and GNDA nets, replaced connection with a net-tie, and updated corresponding copper fills around HX711
This commit is contained in:
Scott Bezek 2022-10-02 21:40:10 -07:00 committed by GitHub
parent 710fbcdc67
commit 3bee19df93
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
23 changed files with 34734 additions and 11848 deletions

View File

@ -7,7 +7,7 @@ on:
jobs: jobs:
export-electronics: export-electronics:
name: Export Electronics name: Export Electronics
runs-on: ubuntu-20.04 runs-on: ubuntu-22.04
steps: steps:
- name: Checkout code - name: Checkout code
@ -31,17 +31,6 @@ jobs:
env: env:
PYTHONUNBUFFERED: 1 PYTHONUNBUFFERED: 1
- name: Render PCB 3D [view_base]
run: |
./electronics/scripts/export_3d.py electronics/view_base/view_base.kicad_pcb --suffix front --width 1024 --height 1024 --skip-virtual --color-soldermask 1 1 1 --color-silk 0.1 0.1 0.1 --release-prefix releases/view_base/ transform z+ z+ rx+ rx+ rz- ry- ry- mu
cp electronics/build/view_base-front-3d.png electronics/build/outputs
./scripts/annotate_image.sh electronics/build/outputs/view_base-front-3d.png
./electronics/scripts/export_3d.py electronics/view_base/view_base.kicad_pcb --suffix back --width 1024 --height 1024 --skip-virtual --color-soldermask 1 1 1 --color-silk 0.1 0.1 0.1 --release-prefix releases/view_base/ transform z+ z+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ rx+ rx+ rz- ry+ ry+ mu
cp electronics/build/view_base-back-3d.png electronics/build/outputs
./scripts/annotate_image.sh electronics/build/outputs/view_base-back-3d.png
env:
PYTHONUNBUFFERED: 1
- name: Export JLCPCB fabrication files [view_screen] - name: Export JLCPCB fabrication files [view_screen]
run: | run: |
./electronics/scripts/export_jlcpcb.py --release-prefix releases/view_screen/ electronics/view_screen/view_screen.kicad_pcb ./electronics/scripts/export_jlcpcb.py --release-prefix releases/view_screen/ electronics/view_screen/view_screen.kicad_pcb
@ -54,33 +43,45 @@ jobs:
env: env:
PYTHONUNBUFFERED: 1 PYTHONUNBUFFERED: 1
- name: Render PCB 3D [view_screen]
run: |
./electronics/scripts/export_3d.py electronics/view_screen/view_screen.kicad_pcb --suffix front --width 1024 --height 1024 --skip-virtual --release-prefix releases/view_screen/ transform z+ z+ rx+ rx+ rz- ry- ry- mu
cp electronics/build/view_screen-front-3d.png electronics/build/outputs
./scripts/annotate_image.sh electronics/build/outputs/view_screen-front-3d.png
./electronics/scripts/export_3d.py electronics/view_screen/view_screen.kicad_pcb --suffix back --width 1024 --height 1024 --skip-virtual --release-prefix releases/view_screen/ transform z+ z+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ ry+ rx+ rx+ rz- ry+ ry+ mu
cp electronics/build/view_screen-back-3d.png electronics/build/outputs
./scripts/annotate_image.sh electronics/build/outputs/view_screen-back-3d.png
env:
PYTHONUNBUFFERED: 1
- name: Export artifacts (KiBot) [view_base] - name: Export artifacts (KiBot) [view_base]
uses: INTI-CMNB/KiBot@9fdbfa54117f1cac88ba92a402679d1debce8640 uses: INTI-CMNB/KiBot@db2185ac51d83f729e632c38e23b2d9df7ccd460
with: with:
config: electronics/view_base/view_base.kibot.yml config: electronics/view_base/view_base.kibot.yml
dir: electronics/build/outputs dir: electronics/build/outputs
schema: 'electronics/view_base/view_base.sch' schema: 'electronics/view_base/view_base.kicad_sch'
board: 'electronics/view_base/view_base.kicad_pcb' board: 'electronics/view_base/view_base.kicad_pcb'
- name: Export artifacts (KiBot) [view_screen] - name: Export artifacts (KiBot) [view_screen]
uses: INTI-CMNB/KiBot@9fdbfa54117f1cac88ba92a402679d1debce8640 uses: INTI-CMNB/KiBot@db2185ac51d83f729e632c38e23b2d9df7ccd460
with: with:
config: electronics/view_screen/view_screen.kibot.yml config: electronics/view_screen/view_screen.kibot.yml
dir: electronics/build/outputs dir: electronics/build/outputs
schema: 'electronics/view_screen/view_screen.sch' schema: 'electronics/view_screen/view_screen.kicad_sch'
board: 'electronics/view_screen/view_screen.kicad_pcb' board: 'electronics/view_screen/view_screen.kicad_pcb'
- name: Update 3D artifacts [view_base]
# Need to chown files back to runner, as ownership gets set to root by the KiBot Actions
run: |
sudo chown runner:docker electronics/build/outputs/*
mv electronics/build/outputs/view_base-3D_top.png electronics/build/outputs/view_base-front-3d.png
./scripts/annotate_image.sh electronics/build/outputs/view_base-front-3d.png
mv electronics/build/outputs/view_base-3D_bottom.png electronics/build/outputs/view_base-back-3d.png
./scripts/annotate_image.sh electronics/build/outputs/view_base-back-3d.png
env:
PYTHONUNBUFFERED: 1
- name: Update 3D artifacts [view_screen]
# Need to chown files back to runner, as ownership gets set to root by the KiBot Actions
run: |
sudo chown runner:docker electronics/build/outputs/*
mv electronics/build/outputs/view_screen-3D_top.png electronics/build/outputs/view_screen-front-3d.png
./scripts/annotate_image.sh electronics/build/outputs/view_screen-front-3d.png
mv electronics/build/outputs/view_screen-3D_bottom.png electronics/build/outputs/view_screen-back-3d.png
./scripts/annotate_image.sh electronics/build/outputs/view_screen-back-3d.png
env:
PYTHONUNBUFFERED: 1
- name: Archive artifacts - name: Archive artifacts
uses: actions/upload-artifact@v2 uses: actions/upload-artifact@v2
if: always() if: always()

1
.gitignore vendored
View File

@ -8,6 +8,7 @@
*.dsn *.dsn
fp-info-cache fp-info-cache
_autosave*.kicad_pcb _autosave*.kicad_pcb
*.kicad_prl
# Proprietary 3d model (for KiCAD) # Proprietary 3d model (for KiCAD)
**/proprietary/*.stp **/proprietary/*.stp

View File

@ -1,41 +1,45 @@
(module USB4510_NoPaste (layer F.Cu) (tedit 620C1622) (footprint "USB4510_NoPaste" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 63329430)
(attr smd) (attr smd)
(fp_text reference REF** (at 0 -3.35) (layer F.Fab) (fp_text reference "REF**" (at 0 -3.35) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
(tstamp fb9fead8-eca2-4b53-b652-4292bca55272)
) )
(fp_text value USB4510_NoPaste (at 0 -0.5) (layer F.Fab) (fp_text value "USB4510_NoPaste" (at 0 -0.5) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
(tstamp 0c3e0028-b3b7-4329-b48a-75337a358f3e)
) )
(fp_line (start -4.62 0) (end -4.62 -5.7) (layer Edge.Cuts) (width 0.2)) (fp_line (start -4.62 0) (end -4.62 -5.7) (layer "Edge.Cuts") (width 0.2) (tstamp 8a80f9a6-35b6-4540-86c7-f39b39959daa))
(fp_line (start -4.12 -6.2) (end 4.12 -6.2) (layer Edge.Cuts) (width 0.2)) (fp_line (start 4.62 0) (end 4.62 -5.7) (layer "Edge.Cuts") (width 0.2) (tstamp b181e61f-2ece-44d0-b3d8-4cf9aab3cc52))
(fp_line (start 4.62 0) (end 4.62 -5.7) (layer Edge.Cuts) (width 0.2)) (fp_line (start -4.12 -6.2) (end 4.12 -6.2) (layer "Edge.Cuts") (width 0.2) (tstamp ef3053b8-279f-473d-82b1-edd879beea93))
(fp_line (start -4.47 0.5) (end -4.47 -6) (layer F.Fab) (width 0.05)) (fp_arc (start -4.62 -5.7) (mid -4.473553 -6.053553) (end -4.12 -6.2) (layer "Edge.Cuts") (width 0.2) (tstamp caf3b000-b380-4ea0-8fc3-06cb851ddfcb))
(fp_line (start 4.47 0.5) (end 4.47 -6) (layer F.Fab) (width 0.05)) (fp_arc (start 4.12 -6.2) (mid 4.473553 -6.053553) (end 4.62 -5.7) (layer "Edge.Cuts") (width 0.2) (tstamp ec7c110d-3397-4876-9b1e-359c83f8a42d))
(fp_line (start -4.47 0.5) (end 4.47 0.5) (layer F.Fab) (width 0.05)) (fp_line (start -4.47 0.5) (end -4.47 -6) (layer "F.Fab") (width 0.05) (tstamp 6d869c35-f48b-45fb-9e33-550c174c3c2f))
(fp_line (start 4.47 -6) (end -4.47 -6) (layer F.Fab) (width 0.05)) (fp_line (start 4.47 -6) (end -4.47 -6) (layer "F.Fab") (width 0.05) (tstamp d448b3d7-8604-429b-a6f5-d8433bbecdd0))
(fp_arc (start -4.12 -5.7) (end -4.12 -6.2) (angle -90) (layer Edge.Cuts) (width 0.2)) (fp_line (start 4.47 0.5) (end 4.47 -6) (layer "F.Fab") (width 0.05) (tstamp e593d6e1-8805-468f-ace3-8f153388fa1d))
(fp_arc (start 4.12 -5.7) (end 4.62 -5.7) (angle -90) (layer Edge.Cuts) (width 0.2)) (fp_line (start -4.47 0.5) (end 4.47 0.5) (layer "F.Fab") (width 0.05) (tstamp fe31bc1b-e400-4908-807a-073938dd1851))
(pad S1 thru_hole oval (at 5.62 -5.6) (size 1 1.8) (drill oval 0.6 1.4) (layers *.Cu *.Mask)) (pad "A1" smd rect (at -3.2 -6.75) (size 0.6 1.09) (layers "F.Cu" "F.Mask") (tstamp 9789ff7e-1373-4d34-8dcd-11af0c9c3e4f))
(pad S1 thru_hole oval (at -5.62 -1.6) (size 1 2.2) (drill oval 0.6 1.8) (layers *.Cu *.Mask)) (pad "A4" smd rect (at -2.4 -6.75) (size 0.6 1.09) (layers "F.Cu" "F.Mask") (tstamp 4b64f6df-62ba-4c1f-9357-3133f88ff9bd))
(pad S1 thru_hole oval (at 5.62 -1.6) (size 1 2.2) (drill oval 0.6 1.8) (layers *.Cu *.Mask)) (pad "A5" smd rect (at -1.25 -6.75) (size 0.3 1.09) (layers "F.Cu" "F.Mask") (tstamp 13e2216a-5685-44fb-b37b-e3377d494a4d))
(pad S1 thru_hole oval (at -5.62 -5.6) (size 1 1.8) (drill oval 0.6 1.4) (layers *.Cu *.Mask)) (pad "A6" smd rect (at -0.25 -6.75) (size 0.3 1.09) (layers "F.Cu" "F.Mask") (tstamp 9c993241-b300-4c08-8fb5-2c70bdcba2ee))
(pad A1 smd rect (at -3.2 -6.75) (size 0.6 1.1) (layers F.Cu F.Mask)) (pad "A7" smd rect (at 0.25 -6.75) (size 0.3 1.09) (layers "F.Cu" "F.Mask") (tstamp 7bc4d422-ec63-4bcc-89be-3eac726fdba7))
(pad A4 smd rect (at -2.4 -6.75) (size 0.6 1.1) (layers F.Cu F.Mask)) (pad "A8" smd rect (at 1.25 -6.75) (size 0.3 1.09) (layers "F.Cu" "F.Mask") (tstamp 9bb5793e-9656-4b7f-83d8-8e7a78aeb568))
(pad B12 smd rect (at -3.2 -6.75) (size 0.6 1.1) (layers F.Cu F.Mask)) (pad "A9" smd rect (at 2.4 -6.75) (size 0.6 1.09) (layers "F.Cu" "F.Mask") (tstamp 1e3679ca-9b22-4c4d-b919-ad655c9fa7cd))
(pad B9 smd rect (at -2.4 -6.75) (size 0.6 1.1) (layers F.Cu F.Mask)) (pad "A12" smd rect (at 3.2 -6.75) (size 0.6 1.09) (layers "F.Cu" "F.Mask") (tstamp da6e4cba-b944-4298-807a-017a29efd608))
(pad B8 smd rect (at -1.75 -6.75) (size 0.3 1.1) (layers F.Cu F.Mask)) (pad "B1" smd rect (at 3.2 -6.75) (size 0.6 1.09) (layers "F.Cu" "F.Mask") (tstamp a8a17960-74d8-4f78-a5a9-0866b9d8d09f))
(pad A5 smd rect (at -1.25 -6.75) (size 0.3 1.1) (layers F.Cu F.Mask)) (pad "B4" smd rect (at 2.4 -6.75) (size 0.6 1.09) (layers "F.Cu" "F.Mask") (tstamp a202737f-3bef-4789-86fe-0d52089f6e3f))
(pad B7 smd rect (at -0.75 -6.75) (size 0.3 1.1) (layers F.Cu F.Mask)) (pad "B5" smd rect (at 1.75 -6.75) (size 0.3 1.09) (layers "F.Cu" "F.Mask") (tstamp b7723b28-f2bb-4f44-9dd9-a41ed5b213a7))
(pad A6 smd rect (at -0.25 -6.75) (size 0.3 1.1) (layers F.Cu F.Mask)) (pad "B6" smd rect (at 0.75 -6.75) (size 0.3 1.09) (layers "F.Cu" "F.Mask") (tstamp e45ee289-0e09-4fb1-8e60-b9936eece8bf))
(pad A7 smd rect (at 0.25 -6.75) (size 0.3 1.1) (layers F.Cu F.Mask)) (pad "B7" smd rect (at -0.75 -6.75) (size 0.3 1.09) (layers "F.Cu" "F.Mask") (tstamp bade9c7d-286a-4c69-846c-66807ca46170))
(pad B6 smd rect (at 0.75 -6.75) (size 0.3 1.1) (layers F.Cu F.Mask)) (pad "B8" smd rect (at -1.75 -6.75) (size 0.3 1.09) (layers "F.Cu" "F.Mask") (tstamp 86122c46-0a56-4cb2-b00b-306299ff41c2))
(pad A8 smd rect (at 1.25 -6.75) (size 0.3 1.1) (layers F.Cu F.Mask)) (pad "B9" smd rect (at -2.4 -6.75) (size 0.6 1.09) (layers "F.Cu" "F.Mask") (tstamp afd7b33e-4013-4fca-bb55-de9cde044c09))
(pad B5 smd rect (at 1.75 -6.75) (size 0.3 1.1) (layers F.Cu F.Mask)) (pad "B12" smd rect (at -3.2 -6.75) (size 0.6 1.09) (layers "F.Cu" "F.Mask") (tstamp 1908bf63-3c4a-4986-9c9c-298c531e6609))
(pad A9 smd rect (at 2.4 -6.75) (size 0.6 1.1) (layers F.Cu F.Mask)) (pad "S1" thru_hole oval (at 5.62 -1.6) (size 1 2.2) (drill oval 0.6 1.8) (layers *.Cu *.Mask) (tstamp 269ce84d-94aa-4bde-90ee-eb3d25cf6aa5))
(pad B4 smd rect (at 2.4 -6.75) (size 0.6 1.1) (layers F.Cu F.Mask)) (pad "S1" thru_hole oval (at -5.62 -5.6) (size 1 1.8) (drill oval 0.6 1.4) (layers *.Cu *.Mask) (tstamp 943f5f3a-c4bb-435a-a1c9-1e3af120369a))
(pad B1 smd rect (at 3.2 -6.75) (size 0.6 1.1) (layers F.Cu F.Mask)) (pad "S1" thru_hole oval (at 5.62 -5.6) (size 1 1.8) (drill oval 0.6 1.4) (layers *.Cu *.Mask) (tstamp 98cf94aa-9a14-4efb-965e-894e721f61fd))
(pad A12 smd rect (at 3.2 -6.75) (size 0.6 1.1) (layers F.Cu F.Mask)) (pad "S1" thru_hole oval (at -5.62 -1.6) (size 1 2.2) (drill oval 0.6 1.8) (layers *.Cu *.Mask) (tstamp b8ab7155-e1ae-4650-916f-1b5454e577b5))
(model ${KIPRJMOD}/../lib/GCT_USB.3dshapes/proprietary/USB4510-03-1-A.stp (model "${KIPRJMOD}/../lib/GCT_USB.3dshapes/proprietary/USB4510-03-1-A.stp"
(offset (xyz 0 -0.5 0)) (offset (xyz 0 -0.5 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
(rotate (xyz -90 0 0)) (rotate (xyz -90 0 0))

View File

@ -1,70 +1,80 @@
(module QFN-20-1EP_3x3mm_P0.4mm_EP1.65x1.65mm_ThermalVias_LargerViaHoles (layer F.Cu) (tedit 6206B69C) (footprint "QFN-20-1EP_3x3mm_P0.4mm_EP1.65x1.65mm_ThermalVias_LargerViaHoles" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 6206B69C)
(descr "QFN, 20 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3553fc.pdf#page=34), generated with kicad-footprint-generator ipc_noLead_generator.py") (descr "QFN, 20 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/3553fc.pdf#page=34), generated with kicad-footprint-generator ipc_noLead_generator.py")
(tags "QFN NoLead") (tags "QFN NoLead")
(attr smd) (attr smd)
(fp_text reference U5 (at 0 -2.82) (layer F.SilkS) (fp_text reference "U5" (at 0 -2.82) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
(tstamp 09fb01d0-4379-4d3a-bb86-d7479dfbcbd6)
) )
(fp_text value TMC6300 (at 0 2.82) (layer F.Fab) (fp_text value "TMC6300" (at 0 2.82) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
(tstamp 99877568-b776-4553-be84-ba0b8129b2f3)
) )
(fp_line (start 2.12 -2.12) (end -2.12 -2.12) (layer F.CrtYd) (width 0.05)) (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
(fp_line (start 2.12 2.12) (end 2.12 -2.12) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.12 2.12) (end 2.12 2.12) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.12 -2.12) (end -2.12 2.12) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.5 -0.75) (end -0.75 -1.5) (layer F.Fab) (width 0.1))
(fp_line (start -1.5 1.5) (end -1.5 -0.75) (layer F.Fab) (width 0.1))
(fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.Fab) (width 0.1))
(fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.Fab) (width 0.1))
(fp_line (start -0.75 -1.5) (end 1.5 -1.5) (layer F.Fab) (width 0.1))
(fp_line (start -1.16 -1.61) (end -1.61 -1.61) (layer F.SilkS) (width 0.12))
(fp_line (start 1.61 1.61) (end 1.61 1.16) (layer F.SilkS) (width 0.12))
(fp_line (start 1.16 1.61) (end 1.61 1.61) (layer F.SilkS) (width 0.12))
(fp_line (start -1.61 1.61) (end -1.61 1.16) (layer F.SilkS) (width 0.12))
(fp_line (start -1.16 1.61) (end -1.61 1.61) (layer F.SilkS) (width 0.12))
(fp_line (start 1.61 -1.61) (end 1.61 -1.16) (layer F.SilkS) (width 0.12))
(fp_line (start 1.16 -1.61) (end 1.61 -1.61) (layer F.SilkS) (width 0.12))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.75 0.75) (thickness 0.11))) (effects (font (size 0.75 0.75) (thickness 0.11)))
(tstamp 7da46d4f-4e29-4376-9cc1-dc06ab7b607f)
) )
(pad "" smd roundrect (at 0.41 0.41) (size 0.6 0.6) (layers F.Paste) (roundrect_rratio 0.25)) (fp_line (start -1.16 1.61) (end -1.61 1.61) (layer "F.SilkS") (width 0.12) (tstamp 02d2363e-13ac-4bc9-b788-c3bd9b3c2cc0))
(pad "" smd roundrect (at 0.41 -0.41) (size 0.6 0.6) (layers F.Paste) (roundrect_rratio 0.25)) (fp_line (start 1.16 -1.61) (end 1.61 -1.61) (layer "F.SilkS") (width 0.12) (tstamp 226bb7ad-6a92-4a06-bf07-d3cf91d90ef4))
(pad "" smd roundrect (at -0.41 0.41) (size 0.6 0.6) (layers F.Paste) (roundrect_rratio 0.25)) (fp_line (start -1.16 -1.61) (end -1.61 -1.61) (layer "F.SilkS") (width 0.12) (tstamp 2ed2be97-c539-4432-b5e6-838cb195ec75))
(pad "" smd roundrect (at -0.41 -0.41) (size 0.6 0.6) (layers F.Paste) (roundrect_rratio 0.25)) (fp_line (start 1.61 1.61) (end 1.61 1.16) (layer "F.SilkS") (width 0.12) (tstamp 32e5dc58-27f6-42ff-a8d1-9340712c40cd))
(pad PAD smd rect (at 0 0) (size 1.65 1.65) (layers B.Cu) (fp_line (start -1.61 1.61) (end -1.61 1.16) (layer "F.SilkS") (width 0.12) (tstamp 68a86649-753f-4e66-a66d-97805c215e10))
(zone_connect 2)) (fp_line (start 1.16 1.61) (end 1.61 1.61) (layer "F.SilkS") (width 0.12) (tstamp d9871b3e-affe-4219-aa8a-f0a51c3a307a))
(pad PAD thru_hole circle (at -0.5 -0.5) (size 0.6 0.6) (drill 0.3) (layers *.Cu) (fp_line (start 1.61 -1.61) (end 1.61 -1.16) (layer "F.SilkS") (width 0.12) (tstamp f086b697-0a9e-4914-990c-48f238bdcece))
(zone_connect 2)) (fp_line (start 2.12 -2.12) (end -2.12 -2.12) (layer "F.CrtYd") (width 0.05) (tstamp 0bbc8b4f-44c7-4db1-a6c8-96d12fc9292a))
(pad PAD smd rect (at 0 0) (size 1.5 1.5) (layers F.Cu F.Mask) (fp_line (start 2.12 2.12) (end 2.12 -2.12) (layer "F.CrtYd") (width 0.05) (tstamp 12ad2516-6970-48c5-8c9c-069629bdec35))
(zone_connect 2)) (fp_line (start -2.12 -2.12) (end -2.12 2.12) (layer "F.CrtYd") (width 0.05) (tstamp a929cf87-3d42-4cd5-8b28-da62e1b300f8))
(pad 20 smd roundrect (at -0.8 -1.45) (size 0.2 0.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (fp_line (start -2.12 2.12) (end 2.12 2.12) (layer "F.CrtYd") (width 0.05) (tstamp dfa77c89-25b1-4ce8-9b88-9c49eb6dc06c))
(pad 19 smd roundrect (at -0.4 -1.45) (size 0.2 0.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (fp_line (start 1.5 1.5) (end -1.5 1.5) (layer "F.Fab") (width 0.1) (tstamp 4178c85b-dc4a-4466-8048-fc6a0a913480))
(pad 18 smd roundrect (at 0 -1.45) (size 0.2 0.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (fp_line (start -1.5 1.5) (end -1.5 -0.75) (layer "F.Fab") (width 0.1) (tstamp 452d421e-0bb5-476b-80b0-c7ce06d29651))
(pad 17 smd roundrect (at 0.4 -1.45) (size 0.2 0.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (fp_line (start -0.75 -1.5) (end 1.5 -1.5) (layer "F.Fab") (width 0.1) (tstamp 544c73f2-9c88-45ac-88a3-9da0ae3c5792))
(pad 16 smd roundrect (at 0.8 -1.45) (size 0.2 0.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (fp_line (start -1.5 -0.75) (end -0.75 -1.5) (layer "F.Fab") (width 0.1) (tstamp 81cca155-55c4-4ab1-b013-e3b5f9dc0a56))
(pad 15 smd roundrect (at 1.45 -0.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer "F.Fab") (width 0.1) (tstamp fa8556e1-7b2a-4964-9288-df2bda67b28a))
(pad 14 smd roundrect (at 1.45 -0.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "" smd roundrect (at 0.41 -0.41) (size 0.6 0.6) (layers "F.Paste") (roundrect_rratio 0.25) (tstamp 90039618-6cb2-48fc-9714-37f106589a31))
(pad 13 smd roundrect (at 1.45 0) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "" smd roundrect (at -0.41 0.41) (size 0.6 0.6) (layers "F.Paste") (roundrect_rratio 0.25) (tstamp bae8ee43-d884-49c9-9951-cf1b278a0ffd))
(pad 12 smd roundrect (at 1.45 0.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "" smd roundrect (at 0.41 0.41) (size 0.6 0.6) (layers "F.Paste") (roundrect_rratio 0.25) (tstamp cc85b9ee-6c1a-4f81-83ff-a14a33d11117))
(pad 11 smd roundrect (at 1.45 0.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "" smd roundrect (at -0.41 -0.41) (size 0.6 0.6) (layers "F.Paste") (roundrect_rratio 0.25) (tstamp e1949ff9-f274-4e4b-bf87-443cbf233870))
(pad 10 smd roundrect (at 0.8 1.45) (size 0.2 0.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "1" smd roundrect (at -1.45 -0.8) (size 0.7 0.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 936bea39-2e00-4426-8699-fddc8cf7772e))
(pad 9 smd roundrect (at 0.4 1.45) (size 0.2 0.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "2" smd roundrect (at -1.45 -0.4) (size 0.7 0.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 13409c13-b1cb-4dbe-9abf-833e4b3e996d))
(pad 8 smd roundrect (at 0 1.45) (size 0.2 0.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "3" smd roundrect (at -1.45 0) (size 0.7 0.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 31282874-aa96-46e0-ab62-93e27ad65a8b))
(pad 7 smd roundrect (at -0.4 1.45) (size 0.2 0.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "4" smd roundrect (at -1.45 0.4) (size 0.7 0.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp bd2b77be-f184-4168-a0aa-e77c2caa46d5))
(pad 6 smd roundrect (at -0.8 1.45) (size 0.2 0.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "5" smd roundrect (at -1.45 0.8) (size 0.7 0.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 8768400b-6391-4a9d-943d-f8d27252bf25))
(pad 5 smd roundrect (at -1.45 0.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "6" smd roundrect (at -0.8 1.45) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp fc8f867f-4aee-41df-b1d6-92be9369e5d4))
(pad 4 smd roundrect (at -1.45 0.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "7" smd roundrect (at -0.4 1.45) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 26f70200-7762-4b2e-b244-b851ff4801df))
(pad 3 smd roundrect (at -1.45 0) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "8" smd roundrect (at 0 1.45) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp dd1060ed-1c92-4b29-b26e-543e96cc9b11))
(pad 2 smd roundrect (at -1.45 -0.4) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "9" smd roundrect (at 0.4 1.45) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 18bb59da-bc32-44de-82d1-4245fa7638ba))
(pad 1 smd roundrect (at -1.45 -0.8) (size 0.7 0.2) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad "10" smd roundrect (at 0.8 1.45) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp d5af8127-a260-46a4-bce0-033769a21f79))
(pad PAD thru_hole circle (at 0.5 -0.5) (size 0.6 0.6) (drill 0.3) (layers *.Cu) (pad "11" smd roundrect (at 1.45 0.8) (size 0.7 0.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp e7294b88-276a-4a01-a13d-abe2e8533986))
(zone_connect 2)) (pad "12" smd roundrect (at 1.45 0.4) (size 0.7 0.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp b5486e78-c82d-4079-9ea4-7f62fe8416c5))
(pad PAD thru_hole circle (at 0.5 0.5) (size 0.6 0.6) (drill 0.3) (layers *.Cu) (pad "13" smd roundrect (at 1.45 0) (size 0.7 0.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 4c63cb92-e61b-44e6-bca8-8f9371dbc10e))
(zone_connect 2)) (pad "14" smd roundrect (at 1.45 -0.4) (size 0.7 0.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp d6b4c760-c565-4d97-87dd-2d21bce2352f))
(pad PAD thru_hole circle (at -0.5 0.5) (size 0.6 0.6) (drill 0.3) (layers *.Cu) (pad "15" smd roundrect (at 1.45 -0.8) (size 0.7 0.2) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 4e8214b6-910c-4756-9b35-4760379ddc2d))
(zone_connect 2)) (pad "16" smd roundrect (at 0.8 -1.45) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 6c259065-d9e9-4c18-9011-f9f7231f5dda))
(model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm.step (pad "17" smd roundrect (at 0.4 -1.45) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp e926b924-479d-4be2-871f-73cd0ec74350))
(at (xyz 0 0 0)) (pad "18" smd roundrect (at 0 -1.45) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp ab3a9411-e49b-4cd3-939f-e22ee6dd7176))
(pad "19" smd roundrect (at -0.4 -1.45) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp 6b169ff4-43a6-42c2-b316-633647f234df))
(pad "20" smd roundrect (at -0.8 -1.45) (size 0.2 0.7) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) (tstamp d8e192fa-0c96-412b-8389-9cda0a5c2b9e))
(pad "PAD" thru_hole circle (at -0.5 -0.5) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
(zone_connect 2) (tstamp 2425433c-cf8c-42c8-9410-372b6126b83f))
(pad "PAD" thru_hole circle (at 0.5 -0.5) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
(zone_connect 2) (tstamp 307b0505-edb0-4296-bf4b-3346771976c3))
(pad "PAD" smd rect (at 0 0) (size 4 4) (layers "B.Cu" "B.Mask")
(zone_connect 2) (tstamp 4e7ad814-d93a-4ebc-a5a1-d6eea38ad88e))
(pad "PAD" thru_hole circle (at 0.5 0.5) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
(zone_connect 2) (tstamp 61b4b466-5770-4b4a-850b-70299bba4740))
(pad "PAD" thru_hole circle (at -0.5 0.5) (size 0.6 0.6) (drill 0.3) (layers *.Cu)
(zone_connect 2) (tstamp a3963e6c-8ba2-406c-af49-43c1d04e5561))
(pad "PAD" smd rect (at 0 0) (size 1.5 1.5) (layers "F.Cu" "F.Mask")
(zone_connect 2) (tstamp f954229e-7e7b-41ab-b6af-fc32e2286d33))
(model "${KISYS3DMOD}/Package_DFN_QFN.3dshapes/UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm.step"
(offset (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
(model "${KICAD6_3DMODEL_DIR}/Package_DFN_QFN.3dshapes/UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm.step"
(offset (xyz 0 0 0))
(scale (xyz 1 1 1)) (scale (xyz 1 1 1))
(rotate (xyz 0 0 0)) (rotate (xyz 0 0 0))
) )

View File

@ -1,55 +1,74 @@
(module BF350-3AA (layer F.Cu) (tedit 622E2DB0) (footprint "BF350-3AA" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tedit 622E2DB0)
(attr smd) (attr smd)
(fp_text reference REF** (at 0.1 -4.2 180) (layer F.Fab) (fp_text reference "REF**" (at 0.1 -4.2 180) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
(tstamp 3493a279-1cbd-4bb3-a326-8ecdfc5191da)
) )
(fp_text value BF350-3AA (at -2.65 0.05 90) (layer F.Fab) (fp_text value "BF350-3AA" (at -2.65 0.05 90) (layer "F.Fab")
(effects (font (size 0.8 0.8) (thickness 0.1))) (effects (font (size 0.8 0.8) (thickness 0.1)))
(tstamp e1faa0f8-f5bb-4536-b2ee-5e4cc81b62ab)
) )
(fp_line (start 1.3 0.35) (end 1.5 0.35) (layer F.Fab) (width 0.12)) (fp_line (start -2.7 -4.2) (end -1.7 -4.2) (layer "F.SilkS") (width 0.15) (tstamp 20e5d5a5-6e97-4295-a890-541a42e220fc))
(fp_line (start 1.5 0.35) (end 1.5 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start 2.7 -4.2) (end 1.7 -4.2) (layer "F.SilkS") (width 0.15) (tstamp 3fa65876-bd71-4e67-b189-31bc06fd1421))
(fp_line (start 1.5 -3.15) (end 1.7 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start 2.7 -4.2) (end 2.7 -3.2) (layer "F.SilkS") (width 0.15) (tstamp 4137fd16-fd9e-40c4-a9e9-a837495261b8))
(fp_line (start 1.7 -3.15) (end 1.7 1.05) (layer F.Fab) (width 0.12)) (fp_line (start -2.7 -4.2) (end -2.7 -3.2) (layer "F.SilkS") (width 0.15) (tstamp 73526dbd-6761-49a8-b1f0-d7a34f9342b1))
(fp_line (start 0.9 0.35) (end 1.1 0.35) (layer F.Fab) (width 0.12)) (fp_poly (pts
(fp_line (start 1.1 0.35) (end 1.1 -3.15) (layer F.Fab) (width 0.12)) (xy 2.5 -4)
(fp_line (start 1.1 -3.15) (end 1.3 -3.15) (layer F.Fab) (width 0.12)) (xy 2.5 4)
(fp_line (start 1.3 -3.15) (end 1.3 0.35) (layer F.Fab) (width 0.12)) (xy -2.5 4)
(fp_line (start 0.5 0.35) (end 0.7 0.35) (layer F.Fab) (width 0.12)) (xy -2.5 -4)
(fp_line (start 0.7 0.35) (end 0.7 -3.15) (layer F.Fab) (width 0.12)) ) (layer "F.Mask") (width 0.1) (fill solid) (tstamp 6509513a-b3f6-4223-a411-5d3644eabb2f))
(fp_line (start 0.7 -3.15) (end 0.9 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start 0.1 0.35) (end 0.3 0.35) (layer "F.Fab") (width 0.12) (tstamp 03979296-2d31-441d-8d4e-89b63f9db3ea))
(fp_line (start 0.9 -3.15) (end 0.9 0.35) (layer F.Fab) (width 0.12)) (fp_line (start -0.3 -3.15) (end -0.3 0.35) (layer "F.Fab") (width 0.12) (tstamp 04ade5fb-85d6-434e-98d4-47ee9e70ad4e))
(fp_line (start 0.1 0.35) (end 0.3 0.35) (layer F.Fab) (width 0.12)) (fp_line (start -0.1 -3.15) (end 0.1 -3.15) (layer "F.Fab") (width 0.12) (tstamp 0f6ffbf0-ff24-40d6-aed4-e250712fd4ca))
(fp_line (start 0.3 0.35) (end 0.3 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start -1.7 -3.15) (end -1.5 -3.15) (layer "F.Fab") (width 0.12) (tstamp 13fc5119-981c-46d9-9f0c-52435d42c951))
(fp_line (start 0.3 -3.15) (end 0.5 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start -2.05 3.55) (end -2.05 -3.55) (layer "F.Fab") (width 0.12) (tstamp 1a291939-a39a-4075-9195-e6d0e7dccac9))
(fp_line (start 0.5 -3.15) (end 0.5 0.35) (layer F.Fab) (width 0.12)) (fp_line (start 0.3 0.35) (end 0.3 -3.15) (layer "F.Fab") (width 0.12) (tstamp 1fba3fea-5a2b-45f6-84e4-847364eaf0ac))
(fp_line (start -0.3 0.35) (end -0.1 0.35) (layer F.Fab) (width 0.12)) (fp_line (start -1.7 1.05) (end -1.7 -3.15) (layer "F.Fab") (width 0.12) (tstamp 24248488-7752-47f0-bc59-9b6db4d0583d))
(fp_line (start -0.1 0.35) (end -0.1 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start -0.3 0.35) (end -0.1 0.35) (layer "F.Fab") (width 0.12) (tstamp 2443e7a8-aa5e-4b7c-8d34-c100a3ccc72f))
(fp_line (start -0.1 -3.15) (end 0.1 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start -0.7 0.35) (end -0.5 0.35) (layer "F.Fab") (width 0.12) (tstamp 2750b826-b60e-4802-b813-e47f88a57a98))
(fp_line (start 0.1 -3.15) (end 0.1 0.35) (layer F.Fab) (width 0.12)) (fp_line (start -0.9 -3.15) (end -0.7 -3.15) (layer "F.Fab") (width 0.12) (tstamp 2c1c3beb-62cf-4d17-bb4c-27f36a4a11a8))
(fp_line (start -0.7 0.35) (end -0.5 0.35) (layer F.Fab) (width 0.12)) (fp_line (start -1.5 -3.15) (end -1.5 0.35) (layer "F.Fab") (width 0.12) (tstamp 3743f2c1-b3ac-4a65-bbea-cc3247ca3427))
(fp_line (start -0.5 0.35) (end -0.5 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start 1.7 -3.15) (end 1.7 1.05) (layer "F.Fab") (width 0.12) (tstamp 3ddf8bf4-2b12-47e0-9869-7d393f1ea8b7))
(fp_line (start -0.5 -3.15) (end -0.3 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start -1.1 0.35) (end -0.9 0.35) (layer "F.Fab") (width 0.12) (tstamp 44cb5b50-2558-4eed-88d0-778226af8016))
(fp_line (start -0.3 -3.15) (end -0.3 0.35) (layer F.Fab) (width 0.12)) (fp_line (start -0.5 -3.15) (end -0.3 -3.15) (layer "F.Fab") (width 0.12) (tstamp 4638ecd4-63e4-4c57-9bf4-9b04269c5102))
(fp_line (start -1.1 0.35) (end -0.9 0.35) (layer F.Fab) (width 0.12)) (fp_line (start 0.3 -3.15) (end 0.5 -3.15) (layer "F.Fab") (width 0.12) (tstamp 47215d60-2457-451c-a1ec-34296ab07906))
(fp_line (start -0.9 0.35) (end -0.9 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start -1.3 -3.15) (end -1.1 -3.15) (layer "F.Fab") (width 0.12) (tstamp 4de53f39-32fb-4bc7-98f7-8647ad170ae0))
(fp_line (start -0.9 -3.15) (end -0.7 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start 0.9 0.35) (end 1.1 0.35) (layer "F.Fab") (width 0.12) (tstamp 618028fb-ee55-4e6a-81ed-b729fa568f01))
(fp_line (start -0.7 -3.15) (end -0.7 0.35) (layer F.Fab) (width 0.12)) (fp_line (start 1.1 0.35) (end 1.1 -3.15) (layer "F.Fab") (width 0.12) (tstamp 622d7a25-0b74-427a-a19d-c9041f8c0401))
(fp_line (start -1.1 -3.15) (end -1.1 0.35) (layer F.Fab) (width 0.12)) (fp_line (start -0.5 0.35) (end -0.5 -3.15) (layer "F.Fab") (width 0.12) (tstamp 6a1065f4-d2d5-43c3-94b2-1926681fdb3f))
(fp_line (start -1.3 -3.15) (end -1.1 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start 0.1 -3.15) (end 0.1 0.35) (layer "F.Fab") (width 0.12) (tstamp 6e2f67a4-97cd-4f20-a0f6-e53b7d913b4d))
(fp_line (start -1.3 0.35) (end -1.3 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start 1.3 -3.15) (end 1.3 0.35) (layer "F.Fab") (width 0.12) (tstamp 6f15124a-735f-4c38-906c-ceba73c7981c))
(fp_line (start -1.5 0.35) (end -1.3 0.35) (layer F.Fab) (width 0.12)) (fp_line (start -1.1 -3.15) (end -1.1 0.35) (layer "F.Fab") (width 0.12) (tstamp 7563570e-9579-4aca-9497-a6412de7ce34))
(fp_line (start -1.5 -3.15) (end -1.5 0.35) (layer F.Fab) (width 0.12)) (fp_line (start 1.5 -3.15) (end 1.7 -3.15) (layer "F.Fab") (width 0.12) (tstamp 75881bd5-3019-4d32-8561-b0b4774ce8b8))
(fp_line (start -1.7 -3.15) (end -1.5 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start -0.1 0.35) (end -0.1 -3.15) (layer "F.Fab") (width 0.12) (tstamp 86e41284-fc36-49ef-9d25-37f38e6e83ca))
(fp_line (start -1.7 1.05) (end -1.7 -3.15) (layer F.Fab) (width 0.12)) (fp_line (start -0.9 0.35) (end -0.9 -3.15) (layer "F.Fab") (width 0.12) (tstamp 8d5870d7-100f-4f14-bb4b-91a0e1547c90))
(fp_poly (pts (xy 1.7 3.2) (xy 0.3 3.2) (xy 0.3 1.05) (xy 1.7 1.05)) (layer F.Fab) (width 0.12)) (fp_line (start 0.9 -3.15) (end 0.9 0.35) (layer "F.Fab") (width 0.12) (tstamp a33875ba-4c30-46f0-9a43-9ad5695529a5))
(fp_poly (pts (xy -0.3 3.2) (xy -1.7 3.2) (xy -1.7 1.05) (xy -0.3 1.05)) (layer F.Fab) (width 0.12)) (fp_line (start 0.7 -3.15) (end 0.9 -3.15) (layer "F.Fab") (width 0.12) (tstamp aca9d48c-bacc-4904-aa99-2aca2a68f719))
(fp_line (start 2.05 3.55) (end -2.05 3.55) (layer F.Fab) (width 0.12)) (fp_line (start 0.7 0.35) (end 0.7 -3.15) (layer "F.Fab") (width 0.12) (tstamp b22c18cc-f75f-4426-b485-0f8bb6e15988))
(fp_line (start 2.05 -3.55) (end 2.05 3.55) (layer F.Fab) (width 0.12)) (fp_line (start -1.3 0.35) (end -1.3 -3.15) (layer "F.Fab") (width 0.12) (tstamp b3d72527-b7ae-4d65-932b-3245db8ac41a))
(fp_line (start -2.05 -3.55) (end 2.05 -3.55) (layer F.Fab) (width 0.12)) (fp_line (start 1.1 -3.15) (end 1.3 -3.15) (layer "F.Fab") (width 0.12) (tstamp bea83f8b-59c4-4049-b959-67b1fa223b2a))
(fp_line (start -2.05 3.55) (end -2.05 -3.55) (layer F.Fab) (width 0.12)) (fp_line (start 0.5 -3.15) (end 0.5 0.35) (layer "F.Fab") (width 0.12) (tstamp c77b68ad-d2b4-43f0-9a1b-e9998aa7e74c))
(fp_poly (pts (xy 2.5 -4) (xy 2.5 4) (xy -2.5 4) (xy -2.5 -4)) (layer F.Mask) (width 0.1)) (fp_line (start 0.5 0.35) (end 0.7 0.35) (layer "F.Fab") (width 0.12) (tstamp ce75fee0-924d-4b03-9d42-1fc6313bfd18))
(fp_line (start -2.5 -4) (end -1.5 -4) (layer F.SilkS) (width 0.15)) (fp_line (start -0.7 -3.15) (end -0.7 0.35) (layer "F.Fab") (width 0.12) (tstamp d1b74848-f177-4c3a-9d63-253250e84cfc))
(fp_line (start -2.5 -4) (end -2.5 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 1.3 0.35) (end 1.5 0.35) (layer "F.Fab") (width 0.12) (tstamp da66d721-0c33-4de0-b9f9-9ce272268e23))
(fp_line (start 2.5 -4) (end 2.5 -3) (layer F.SilkS) (width 0.15)) (fp_line (start 2.05 3.55) (end -2.05 3.55) (layer "F.Fab") (width 0.12) (tstamp db6a769e-4db4-4bca-8574-6e981d819794))
(fp_line (start 2.5 -4) (end 1.5 -4) (layer F.SilkS) (width 0.15)) (fp_line (start -1.5 0.35) (end -1.3 0.35) (layer "F.Fab") (width 0.12) (tstamp eaa97c17-6889-4771-9d07-f98e5df84a49))
(fp_line (start -2.05 -3.55) (end 2.05 -3.55) (layer "F.Fab") (width 0.12) (tstamp eac84cde-4837-45a9-b6f2-8d63ca6d96fe))
(fp_line (start 2.05 -3.55) (end 2.05 3.55) (layer "F.Fab") (width 0.12) (tstamp f7b6aa9e-da00-4a5a-82b9-f26673b342fd))
(fp_line (start 1.5 0.35) (end 1.5 -3.15) (layer "F.Fab") (width 0.12) (tstamp fdfa187b-2f58-4c2f-899f-5f9a6c47ae18))
(fp_poly (pts
(xy -0.3 3.2)
(xy -1.7 3.2)
(xy -1.7 1.05)
(xy -0.3 1.05)
) (layer "F.Fab") (width 0.12) (fill solid) (tstamp 9143d0a2-9b90-4eba-9663-da1c583b32f3))
(fp_poly (pts
(xy 1.7 3.2)
(xy 0.3 3.2)
(xy 0.3 1.05)
(xy 1.7 1.05)
) (layer "F.Fab") (width 0.12) (fill solid) (tstamp f7e652d6-15db-496a-a110-a9b0eade044b))
) )

View File

@ -10,11 +10,11 @@ set -v
DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" >/dev/null 2>&1 && pwd )" DIR="$( cd "$( dirname "${BASH_SOURCE[0]}" )" >/dev/null 2>&1 && pwd )"
sudo add-apt-repository --yes ppa:kicad/kicad-5.1-releases sudo add-apt-repository --yes ppa:kicad/kicad-6.0-releases
sudo apt-get update -qq sudo apt-get update -qq
sudo DEBIAN_FRONTEND=noninteractive apt-get install -y kicad inkscape poppler-utils xdotool recordmydesktop python3-dev python3-pip sudo DEBIAN_FRONTEND=noninteractive apt install -y kicad kicad-packages3d inkscape poppler-utils xdotool recordmydesktop python3-dev python3-pip xvfb
sudo python3 -m pip install psutil kikit==1.0.4 xvfbwrapper sudo python3 -m pip install psutil kikit==1.1.1 xvfbwrapper
mkdir -p ~/.config/kicad mkdir -p ~/.config/kicad
cp /usr/share/kicad/template/fp-lib-table ~/.config/kicad/ cp /usr/share/kicad/template/fp-lib-table ~/.config/kicad/

View File

@ -1,200 +0,0 @@
#!/usr/bin/env python3
# Copyright 2015-2021 Scott Bezek and the splitflap contributors
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
import argparse
import logging
import os
import psutil
import sys
import time
electronics_root = os.path.dirname(os.path.dirname(os.path.abspath(__file__)))
repo_root = os.path.dirname(electronics_root)
sys.path.append(repo_root)
from util import file_util
from export_util import (
patch_config,
PopenContext,
versioned_file,
xdotool,
wait_for_window,
recorded_xvfb,
)
logging.basicConfig(level=logging.DEBUG)
logger = logging.getLogger(__name__)
RENDER_TIMEOUT = 10 * 60
def _wait_for_pcbnew_idle():
start = time.time()
while time.time() < start + RENDER_TIMEOUT:
for proc in psutil.process_iter():
if proc.name() == 'pcbnew':
cpu = proc.cpu_percent(interval=1)
print(f'CPU={cpu}', flush=True)
if cpu < 5:
print('Render took %d seconds' % (time.time() - start))
return
time.sleep(1)
raise RuntimeError('Timeout waiting for pcbnew to go idle')
def _zoom_in():
xdotool([
'click',
'4',
])
time.sleep(0.2)
def _invoke_view_option(index):
command = ['key', 'alt+v'] + ['Down']*index + ['Return']
xdotool(command)
time.sleep(2)
_transforms = {
'z+': ('Zoom in', _zoom_in),
'rx+': ('Rotate X Clockwise', lambda: _invoke_view_option(4)),
'rx-': ('Rotate X Counterclockwise', lambda: _invoke_view_option(5)),
'ry+': ('Rotate Y Clockwise', lambda: _invoke_view_option(6)),
'ry-': ('Rotate Y Counterclockwise', lambda: _invoke_view_option(7)),
'rz+': ('Rotate Z Clockwise', lambda: _invoke_view_option(8)),
'rz-': ('Rotate Z Counterclockwise', lambda: _invoke_view_option(9)),
'ml': ('Move left', lambda: _invoke_view_option(10)),
'mr': ('Move right', lambda: _invoke_view_option(11)),
'mu': ('Move up', lambda: _invoke_view_option(12)),
'md': ('Move down', lambda: _invoke_view_option(13)),
}
def _pcbnew_export_3d(output_file, width, height, transforms):
if os.path.exists(output_file):
os.remove(output_file)
wait_for_window('pcbnew', 'Pcbnew ', additional_commands=['windowfocus'])
time.sleep(1)
logger.info('Open 3d viewer')
xdotool(['key', 'alt+3'])
wait_for_window('3D Viewer', '3D Viewer', additional_commands=['windowfocus'])
time.sleep(3)
# Maximize window
xdotool(['search', '--name', '3D Viewer', 'windowmove', '0', '0'])
xdotool(['search', '--name', '3D Viewer', 'windowsize', str(width), str(height)])
time.sleep(3)
for transform in transforms:
description, func = _transforms[transform]
logger.info(description)
func()
logger.info('Wait for rendering...')
_wait_for_pcbnew_idle()
time.sleep(5)
logger.info('Export current view')
xdotool([
'key',
'alt+f',
'Return',
])
logger.info('Enter build output filename')
xdotool([
'key',
'ctrl+a',
])
xdotool(['type', output_file])
logger.info('Save')
xdotool(['key', 'Return'])
logger.info('Wait before shutdown')
time.sleep(2)
def export_3d(filename, suffix, width, height, transforms, raytrace, virtual, color_soldermask, color_silk, color_board, color_copper, release_prefix):
pcb_file = os.path.abspath(filename)
output_dir = os.path.join(electronics_root, 'build')
file_util.mkdir_p(output_dir)
screencast_output_file = os.path.join(output_dir, 'export_3d_screencast.ogv')
name, _ = os.path.splitext(os.path.basename(pcb_file))
if suffix:
name = name + '-' + suffix
output_file = os.path.join(output_dir, f'{name}-3d.png')
settings = {
'canvas_type': '1',
'RenderEngine': '1' if raytrace else '0',
'ShowFootprints_Virtual': '1' if virtual else '0',
'Render_RAY_Backfloor': '0',
'Render_RAY_ProceduralTextures': '0',
}
def apply_color(name, values):
components = ['Red', 'Green', 'Blue']
for component, value in zip(components, values):
settings[name + '_' + component] = str(value)
apply_color('SMaskColor', color_soldermask)
apply_color('SilkColor', color_silk)
apply_color('BoardBodyColor', color_board)
apply_color('CopperColor', color_copper)
with patch_config(os.path.expanduser('~/.config/kicad/pcbnew'), settings):
with versioned_file(pcb_file, release_prefix):
with recorded_xvfb(screencast_output_file, width=width, height=height, colordepth=24):
with PopenContext(['pcbnew', pcb_file], close_fds=True) as pcbnew_proc:
_pcbnew_export_3d(output_file, width, height, transforms)
pcbnew_proc.terminate()
if __name__ == '__main__':
parser = argparse.ArgumentParser()
parser.add_argument('pcb')
parser.add_argument('--suffix', default='')
parser.add_argument('--width', type=int, default=2560)
parser.add_argument('--height', type=int, default=1440)
parser.add_argument('--skip-raytrace', action='store_true')
parser.add_argument('--skip-virtual', action='store_true', help='Don\'t render virtual footprints')
parser.add_argument('--color-soldermask', type=float, nargs=3, help='Soldermask color as 3 floats from 0-1', default=[0, 0, 0])
parser.add_argument('--color-silk', type=float, nargs=3, help='Silkscreen color as 3 floats from 0-1', default=[1, 1, 1])
parser.add_argument('--color-board', type=float, nargs=3, help='PCB substrate color as 3 floats from 0-1', default=[0.764705882, 0.729411765, 0.607843137])
parser.add_argument('--color-copper', type=float, nargs=3, help='Copper color as 3 floats from 0-1', default=[0.7, 0.7, 0.7])
parser.add_argument('--release-prefix', type=str, required=True, help='Tag prefix to check if this is a tagged/versioned release. E.g. "releases/" for tags like "releases/v1.0"')
# Use subparsers to for an optional nargs="*" choices argument (workaround for https://bugs.python.org/issue9625)
subparsers = parser.add_subparsers(dest='which')
transform_parser = subparsers.add_parser('transform', help='Apply one or more transforms before capturing image')
transform_parser.add_argument('transform', nargs='+', choices=list(_transforms.keys()))
args = parser.parse_args()
transforms = args.transform if args.which == 'transform' else []
export_3d(args.pcb, args.suffix, args.width, args.height, transforms, not args.skip_raytrace, not args.skip_virtual, args.color_soldermask, args.color_silk, args.color_board, args.color_copper, args.release_prefix)

View File

@ -97,11 +97,15 @@ def get_versioned_contents(filename, release_search_prefix):
release_version = tag_version release_version = tag_version
return original_contents, original_contents \ return original_contents, original_contents \
.replace('Date ""', 'Date "%s"' % date_long) \ .replace('Date ""', 'Date "%s"' % date_long) \
.replace('DATE: YYYY-MM-DD TIME TZ', 'DATE: %s' % date_long) \ .replace('DATE: YYYY-MM-DD HH:MM:SS TZ', 'DATE: %s' % date_long) \
.replace('${COMMIT_DATE_LONG}', 'DATE: %s' % date_long) \
.replace('DATE: YYYY-MM-DD', 'DATE: %s' % date) \ .replace('DATE: YYYY-MM-DD', 'DATE: %s' % date) \
.replace('${COMMIT_DATE}', 'DATE: %s' % date) \
.replace('Rev ""', 'Rev "%s"' % rev) \ .replace('Rev ""', 'Rev "%s"' % rev) \
.replace('COMMIT: deadbeef', 'COMMIT: %s' % rev) \ .replace('COMMIT: deadbeef', 'COMMIT: %s' % rev) \
.replace('v#.#', release_version) .replace('${COMMIT_HASH}', 'COMMIT: %s' % rev) \
.replace('v#.#', release_version) \
.replace('${RELEASE_VERSION}', release_version)
@contextmanager @contextmanager

View File

@ -55,7 +55,7 @@ class Plotter(object):
self.plot_options.SetOutputDirectory(build_directory) self.plot_options.SetOutputDirectory(build_directory)
self.plot_options.SetPlotFrameRef(False) self.plot_options.SetPlotFrameRef(False)
self.plot_options.SetLineWidth(pcbnew.FromMM(0.35)) # self.plot_options.SetLineWidth(pcbnew.FromMM(0.35))
self.plot_options.SetScale(1) self.plot_options.SetScale(1)
self.plot_options.SetUseAuxOrigin(True) self.plot_options.SetUseAuxOrigin(True)
self.plot_options.SetMirror(False) self.plot_options.SetMirror(False)

View File

@ -6,6 +6,19 @@ preflight:
run_drc: true run_drc: true
run_erc: true run_erc: true
update_xml: true update_xml: true
set_text_variables:
- name: COMMIT_DATE_LONG
command: 'python3 util/rev_info.py git_date'
- name: COMMIT_DATE
command: 'python3 util/rev_info.py git_date --short'
- name: COMMIT_HASH
command: 'python3 util/rev_info.py git_short_rev'
- name: RELEASE_VERSION
command: 'python3 util/rev_info.py git_release_version releases/view_base/'
filters:
- filter: 'Lines crossing edge cuts'
error: 'silk_over_copper'
regex: 'Arc on Edge.Cuts'
outputs: outputs:
- name: ibom - name: ibom
@ -26,7 +39,27 @@ outputs:
use_alt: false use_alt: false
number: 1 number: 1
aggregate: aggregate:
- file: electronics/view_screen/view_screen.sch - file: electronics/view_screen/view_screen.kicad_sch
name: 'Screen' name: 'Screen'
number: 1 number: 1
ref_id: 'SCREEN-' ref_id: 'SCREEN-'
- name: 3d
type: render_3d
options:
no_virtual: true
view: 'top'
copper: '#99967F'
board: '#C3BA9B'
copper: '#99967F'
zoom: 3
orthographic: true
ray_tracing: true
height: 1024
width: 1024
- name: 3d_back
type: render_3d
extends: 3d
options:
view: 'bottom'

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,446 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.0,
"height": 1.65,
"width": 1.65
},
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.254
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [
"silk_over_copper|105303300|105303300|00000000-0000-0000-0000-0000622ff9d4|a8470270-920a-4fed-9691-22526135f92c",
"silk_over_copper|93752779|95002779|00000000-0000-0000-0000-0000622ffa0d|34d3baf1-c1a6-463d-a7da-03fde565ea93",
"silk_over_copper|94343146|105656854|00000000-0000-0000-0000-0000622ff9e6|e26f0b22-8514-418f-977b-cb0a9761b0f5",
"silk_over_copper|95002779|93752779|00000000-0000-0000-0000-0000622ffa0d|00000000-0000-0000-0000-0000620a3355"
],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.127,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"use_height_for_length_calcs": true
},
"track_widths": [
0.0,
0.25,
0.4,
0.65
],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
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2,
1,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "view_base.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.15,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.15,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 0.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"5edcefbe-9766-42c8-9529-28d0ec865573",
""
]
],
"text_variables": {
"COMMIT_DATE_LONG": "YYYY-MM-DD HH:MM:SS TZ",
"COMMIT_HASH": "deadbeef",
"RELEASE_VERSION": "v#.#"
}
}

File diff suppressed because it is too large Load Diff

View File

@ -1,241 +0,0 @@
update=Thu 10 Feb 2022 12:35:10 PM PST
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=2
BoardThickness=1.2
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.127
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.15
TrackWidth2=0.25
TrackWidth3=0.4
TrackWidth4=0.65
ViaDiameter1=0.8
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.15
TrackWidth=0.15
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

File diff suppressed because it is too large Load Diff

View File

@ -6,6 +6,22 @@ preflight:
run_drc: true run_drc: true
run_erc: true run_erc: true
update_xml: true update_xml: true
set_text_variables:
- name: COMMIT_DATE_LONG
command: 'python3 util/rev_info.py git_date'
- name: COMMIT_DATE
command: 'python3 util/rev_info.py git_date --short'
- name: COMMIT_HASH
command: 'python3 util/rev_info.py git_short_rev'
- name: RELEASE_VERSION
command: 'python3 util/rev_info.py git_release_version releases/view_base/'
filters:
- filter: 'Lines crossing edge cuts'
error: 'silk_over_copper'
regex: 'Line on B.Silkscreen'
- filter: 'Arc crossing hole'
error: 'silk_over_copper'
regex: 'Through hole pad 1'
outputs: outputs:
- name: ibom - name: ibom
@ -19,24 +35,22 @@ outputs:
- name: schematic - name: schematic
type: pdf_sch_print type: pdf_sch_print
# - name: 3d - name: 3d
# type: render_3d type: render_3d
# options: options:
# no_virtual: true no_virtual: true
# view: 'top' view: 'top'
# silk: '#111111' copper: '#99967F'
# solder_mask: '#ffffff' board: '#C3BA9B'
# board: '#C3BA9B' copper: '#99967F'
# copper: '#99967F' zoom: 3
# orthographic: true orthographic: true
# ray_tracing: true ray_tracing: true
# height: 1920 height: 1024
# width: 1920 width: 1024
# zoom: 4
# - name: 3d_back - name: 3d_back
# type: render_3d type: render_3d
# extends: 3d extends: 3d
# options: options:
# view: 'bottom' view: 'bottom'
# zoom: 3

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,444 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.762,
"height": 1.524,
"width": 1.524
},
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.254
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [
"silk_over_copper|106400000|116285093|baf1955b-6681-4a86-aa9e-3d3a086c1f0c|3481639a-8366-42d1-8849-c12d7cd54694",
"silk_over_copper|92999777|100182112|00000000-0000-0000-0000-0000620c0c43|c8c2fa70-d291-4070-8098-e10360210c12",
"silk_over_copper|94300000|116545391|baf1955b-6681-4a86-aa9e-3d3a086c1f0c|42adbe47-7f38-4bdc-b671-33cfe182fd3c"
],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.09999999999999999,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"use_height_for_length_calcs": true
},
"track_widths": [
0.0,
0.4
],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
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0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
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1,
0,
1,
2
],
[
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0,
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1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
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],
[
0,
0,
0,
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0,
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],
[
1,
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1,
0,
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],
[
0,
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0,
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2
],
[
0,
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0,
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0,
2,
2,
2,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
0,
2,
1,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "view_screen.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 0.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"03c6bcc5-70e5-4ed1-8d53-27c57df043e2",
""
]
],
"text_variables": {
"COMMIT_DATE": "YYYY-MM-DD",
"COMMIT_DATE_LONG": "YYYY-MM-DD HH:MM:SS TZ",
"COMMIT_HASH": "deadbeef",
"RELEASE_VERSION": "v#.#"
}
}

File diff suppressed because it is too large Load Diff

View File

@ -1,239 +0,0 @@
update=Sat 12 Feb 2022 08:52:40 PM PST
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=2
BoardThickness=1.2
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
TrackWidth2=0.4
ViaDiameter1=0.8
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

View File

@ -1,367 +0,0 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L Mechanical:MountingHole_Pad H1
U 1 1 62075165
P 3550 1050
F 0 "H1" H 3650 1099 50 0000 L CNN
F 1 "AlignmentHole" H 3650 1008 50 0000 L CNN
F 2 "Holes:AlignmentHole_1.6" H 3550 1050 50 0001 C CNN
F 3 "~" H 3550 1050 50 0001 C CNN
1 3550 1050
1 0 0 -1
$EndComp
NoConn ~ 3550 1150
$Comp
L Connector_Generic:Conn_01x12 J2
U 1 1 620756C7
P 1400 3300
F 0 "J2" H 1318 4017 50 0000 C CNN
F 1 "GC9A01" H 1318 3926 50 0000 C CNN
F 2 "LCD_GC9A01:GC9A01Round1.28" H 1400 3300 50 0001 C CNN
F 3 "~" H 1400 3300 50 0001 C CNN
F 4 "https://www.aliexpress.com/item/1005001321857930.html" H 1400 3300 50 0001 C CNN "AliExpress"
F 5 "N/A" H 1400 3300 50 0001 C CNN "Digikey"
F 6 "N/A" H 1400 3300 50 0001 C CNN "LCSC"
F 7 "N/A" H 1400 3300 50 0001 C CNN "Mouser"
1 1400 3300
-1 0 0 -1
$EndComp
$Comp
L Connector_Generic:Conn_01x04 J1
U 1 1 6207690B
P 6150 2850
F 0 "J1" H 6230 2842 50 0000 L CNN
F 1 "Conn_01x04" H 6230 2751 50 0000 L CNN
F 2 "SolderPads:SolderPads_2mm_4" H 6150 2850 50 0001 C CNN
F 3 "~" H 6150 2850 50 0001 C CNN
1 6150 2850
1 0 0 -1
$EndComp
$Comp
L Connector_Generic:Conn_01x04 J3
U 1 1 62076D99
P 6150 3550
F 0 "J3" H 6230 3542 50 0000 L CNN
F 1 "Conn_01x04" H 6230 3451 50 0000 L CNN
F 2 "SolderPads:SolderPads_2mm_4" H 6150 3550 50 0001 C CNN
F 3 "~" H 6150 3550 50 0001 C CNN
1 6150 3550
1 0 0 -1
$EndComp
Text Label 2200 2800 2 50 ~ 0
GND
Text Label 2200 2900 2 50 ~ 0
LEDK
Text Label 2200 3000 2 50 ~ 0
LEDA
Text Label 2200 3100 2 50 ~ 0
VDD
Text Label 2200 3200 2 50 ~ 0
GND
Text Label 2200 3300 2 50 ~ 0
GND
Text Label 2200 3400 2 50 ~ 0
DC
Text Label 2200 3500 2 50 ~ 0
nCS
Text Label 2200 3600 2 50 ~ 0
SCK
Text Label 2200 3700 2 50 ~ 0
MOSI
Text Label 2200 3800 2 50 ~ 0
nRESET
Text Label 2200 3900 2 50 ~ 0
GND
Wire Wire Line
1600 2800 2200 2800
Wire Wire Line
1600 2900 2200 2900
Wire Wire Line
1600 3000 2200 3000
Wire Wire Line
1600 3100 2200 3100
Wire Wire Line
1600 3200 2200 3200
Wire Wire Line
1600 3300 2200 3300
Wire Wire Line
1600 3400 2200 3400
Wire Wire Line
1600 3500 2200 3500
Wire Wire Line
1600 3600 2200 3600
Wire Wire Line
1600 3700 2200 3700
Wire Wire Line
1600 3800 2200 3800
Wire Wire Line
1600 3900 2200 3900
$Comp
L Transistor_FET:2N7002 Q1
U 1 1 6207DB9F
P 4150 3250
F 0 "Q1" H 4354 3296 50 0000 L CNN
F 1 "2N7002" H 4354 3205 50 0000 L CNN
F 2 "Package_TO_SOT_SMD:SOT-23" H 4350 3175 50 0001 L CIN
F 3 "https://www.onsemi.com/pub/Collateral/NDS7002A-D.PDF" H 4150 3250 50 0001 L CNN
F 4 "2N7002H6327XTSA2CT-ND" H 4150 3250 50 0001 C CNN "Digikey"
F 5 "2N7002" H 4150 3250 50 0001 C CNN "LCSC"
F 6 "771-2N7002NXAKR" H 4150 3250 50 0001 C CNN "Mouser"
1 4150 3250
1 0 0 -1
$EndComp
Wire Wire Line
4250 3450 4250 3750
$Comp
L power:GND #PWR03
U 1 1 6207FE95
P 4250 3750
F 0 "#PWR03" H 4250 3500 50 0001 C CNN
F 1 "GND" H 4255 3577 50 0000 C CNN
F 2 "" H 4250 3750 50 0001 C CNN
F 3 "" H 4250 3750 50 0001 C CNN
1 4250 3750
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR02
U 1 1 6207FFC2
P 3750 3750
F 0 "#PWR02" H 3750 3500 50 0001 C CNN
F 1 "GND" H 3755 3577 50 0000 C CNN
F 2 "" H 3750 3750 50 0001 C CNN
F 3 "" H 3750 3750 50 0001 C CNN
1 3750 3750
1 0 0 -1
$EndComp
$Comp
L Device:R_Small R3
U 1 1 620807F6
P 3750 3550
F 0 "R3" H 3809 3596 50 0000 L CNN
F 1 "1M" H 3809 3505 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric" H 3750 3550 50 0001 C CNN
F 3 "~" H 3750 3550 50 0001 C CNN
F 4 "RMCF0603JT1M00CT-ND" H 3750 3550 50 0001 C CNN "Digikey"
F 5 "652-CR0603FX-1004ELF" H 3750 3550 50 0001 C CNN "Mouser"
1 3750 3550
1 0 0 -1
$EndComp
Wire Wire Line
3950 3250 3750 3250
Wire Wire Line
3750 3250 3750 3450
$Comp
L Device:R_Small R1
U 1 1 6208164C
P 3750 2900
F 0 "R1" H 3809 2946 50 0000 L CNN
F 1 "10k" H 3809 2855 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric" H 3750 2900 50 0001 C CNN
F 3 "~" H 3750 2900 50 0001 C CNN
F 4 "RMCF0603JT10K0CT-ND" H 3750 2900 50 0001 C CNN "Digikey"
F 5 "C98220" H 3750 2900 50 0001 C CNN "LCSC"
F 6 "652-CR0603FX-1002ELF" H 3750 2900 50 0001 C CNN "Mouser"
1 3750 2900
1 0 0 -1
$EndComp
Wire Wire Line
3750 3000 3750 3250
Connection ~ 3750 3250
Wire Wire Line
4250 3050 4250 2700
Wire Wire Line
4250 2700 4100 2700
Text Label 4100 2700 0 50 ~ 0
LEDK
Text Label 3150 2700 0 50 ~ 0
BACKLIGHT_EN
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
3750 3750 3750 3650
$Comp
L Device:C_Small C1
U 1 1 6208DA53
P 2600 3200
F 0 "C1" H 2692 3246 50 0000 L CNN
F 1 "22uF" H 2692 3155 50 0000 L CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 2600 3200 50 0001 C CNN
F 3 "~" H 2600 3200 50 0001 C CNN
F 4 "1276-CL21A226MAYNNNECT-ND" H 2600 3200 50 0001 C CNN "Digikey"
F 5 "C98190" H 2600 3200 50 0001 C CNN "LCSC"
F 6 "187-CL21A226MAYNNNE" H 2600 3200 50 0001 C CNN "Mouser"
1 2600 3200
1 0 0 -1
$EndComp
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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$Comp
L power:GND #PWR01
U 1 1 6208F1F5
P 2800 3600
F 0 "#PWR01" H 2800 3350 50 0001 C CNN
F 1 "GND" H 2805 3427 50 0000 C CNN
F 2 "" H 2800 3600 50 0001 C CNN
F 3 "" H 2800 3600 50 0001 C CNN
1 2800 3600
1 0 0 -1
$EndComp
Text Label 2600 2800 0 50 ~ 0
VDD
Text Label 4750 3700 0 50 ~ 0
LEDA
$Comp
L Device:R_Small R2
U 1 1 6209F498
P 5000 3250
F 0 "R2" H 5059 3296 50 0000 L CNN
F 1 "22R" H 5059 3205 50 0000 L CNN
F 2 "Resistor_SMD:R_0603_1608Metric" H 5000 3250 50 0001 C CNN
F 3 "~" H 5000 3250 50 0001 C CNN
F 4 "RMCF0603JT22R0CT-ND" H 5000 3250 50 0001 C CNN "Digikey"
F 5 "652-CR0603FX-22R0ELF" H 5000 3250 50 0001 C CNN "Mouser"
1 5000 3250
1 0 0 -1
$EndComp
Wire Wire Line
5000 3700 5000 3350
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Text Label 4750 2800 0 50 ~ 0
VDD
$Comp
L Device:C_Small C2
U 1 1 620AE2F6
P 3000 3200
F 0 "C2" H 3092 3246 50 0000 L CNN
F 1 "0.1uF" H 3092 3155 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 3000 3200 50 0001 C CNN
F 3 "~" H 3000 3200 50 0001 C CNN
F 4 "1276-1935-1-ND" H 3000 3200 50 0001 C CNN "Digikey"
F 5 "C1591" H 3000 3200 50 0001 C CNN "LCSC"
F 6 "187-CL10B104KB8NNWC" H 3000 3200 50 0001 C CNN "Mouser"
1 3000 3200
1 0 0 -1
$EndComp
Wire Wire Line
2600 3100 2800 3100
Connection ~ 2800 3100
Wire Wire Line
2800 3100 3000 3100
Wire Wire Line
3000 3300 2800 3300
Connection ~ 2800 3300
Wire Wire Line
2800 3300 2600 3300
Wire Wire Line
5950 2750 5500 2750
Wire Wire Line
5950 2850 5500 2850
Wire Wire Line
5950 2950 5500 2950
Wire Wire Line
5950 3050 5500 3050
Wire Wire Line
5950 3450 5500 3450
Wire Wire Line
5950 3550 5500 3550
Wire Wire Line
5950 3650 5500 3650
Wire Wire Line
5950 3750 5500 3750
Text Label 5500 2750 0 50 ~ 0
GND
Text Label 5500 2850 0 50 ~ 0
VDD
Text Label 5500 2950 0 50 ~ 0
BACKLIGHT_EN
Text Label 5500 3050 0 50 ~ 0
DC
Text Label 5500 3450 0 50 ~ 0
nCS
Text Label 5500 3550 0 50 ~ 0
SCK
Text Label 5500 3650 0 50 ~ 0
MOSI
Text Label 5500 3750 0 50 ~ 0
nRESET
$Comp
L Connector_Generic:Conn_01x04 J4
U 1 1 626526C1
P 7400 2850
F 0 "J4" H 7480 2842 50 0000 L CNN
F 1 "Conn_01x04" H 7480 2751 50 0000 L CNN
F 2 "SolderPads:SolderPads_2mm_4" H 7400 2850 50 0001 C CNN
F 3 "~" H 7400 2850 50 0001 C CNN
1 7400 2850
1 0 0 -1
$EndComp
Wire Wire Line
7200 2750 6750 2750
Wire Wire Line
7200 2850 6750 2850
Wire Wire Line
7200 2950 6750 2950
Wire Wire Line
7200 3050 6750 3050
Text Label 6750 2750 0 50 ~ 0
GND
Text Label 6750 2850 0 50 ~ 0
VDD
Text Label 6750 2950 0 50 ~ 0
BACKLIGHT_EN
Text Label 6750 3050 0 50 ~ 0
DC
$Comp
L Connector_Generic:Conn_01x04 J5
U 1 1 62654604
P 7400 3550
F 0 "J5" H 7480 3542 50 0000 L CNN
F 1 "Conn_01x04" H 7480 3451 50 0000 L CNN
F 2 "SolderPads:SolderPads_2mm_4" H 7400 3550 50 0001 C CNN
F 3 "~" H 7400 3550 50 0001 C CNN
1 7400 3550
1 0 0 -1
$EndComp
Wire Wire Line
7200 3450 6750 3450
Wire Wire Line
7200 3550 6750 3550
Wire Wire Line
7200 3650 6750 3650
Wire Wire Line
7200 3750 6750 3750
Text Label 6750 3450 0 50 ~ 0
nCS
Text Label 6750 3550 0 50 ~ 0
SCK
Text Label 6750 3650 0 50 ~ 0
MOSI
Text Label 6750 3750 0 50 ~ 0
nRESET
$EndSCHEMATC

View File

@ -8,6 +8,7 @@ FONT="$DIR/RobotoMono-Bold.ttf"
# Make sure font exists # Make sure font exists
ls "$FONT" ls "$FONT"
echo "$DIR"
set -v set -v

28
util/rev_info.py Normal file → Executable file
View File

@ -1,3 +1,6 @@
#!/usr/bin/env python3
import argparse
import datetime import datetime
import subprocess import subprocess
@ -31,7 +34,7 @@ def git_date(short=True):
except Exception: except Exception:
raise RuntimeError("Could not read git commit date. Make sure you have git installed and you're working with a git clone of the repository.") raise RuntimeError("Could not read git commit date. Make sure you have git installed and you're working with a git clone of the repository.")
def git_release_version(search_prefix): def git_release_version(search_prefix, fallback=None):
try: try:
tags = subprocess.check_output([ tags = subprocess.check_output([
'git', 'git',
@ -42,7 +45,28 @@ def git_release_version(search_prefix):
for tag in tags: for tag in tags:
if tag.startswith(search_prefix): if tag.startswith(search_prefix):
return tag[len(search_prefix):] return tag[len(search_prefix):]
return None return fallback
except Exception: except Exception:
raise RuntimeError("Could not read git release tags. Make sure you have git installed and you're working with a git clone of the repository.") raise RuntimeError("Could not read git release tags. Make sure you have git installed and you're working with a git clone of the repository.")
if __name__ == '__main__':
parser = argparse.ArgumentParser()
subparsers = parser.add_subparsers(required=True, dest='option')
parser_git_short_rev = subparsers.add_parser('git_short_rev')
parser_git_date = subparsers.add_parser('git_date')
parser_git_date.add_argument('--short', action='store_true')
parser_git_release_version = subparsers.add_parser('git_release_version')
parser_git_release_version.add_argument('search_prefix')
args = parser.parse_args()
if args.option == 'git_short_rev':
print(git_short_rev())
elif args.option == 'git_date':
print(git_date(short=args.short))
elif args.option == 'git_release_version':
print(git_release_version(args.search_prefix, fallback='v#.#'))
else:
raise RuntimeError('Unexpected option')