Commit Graph

6 Commits

Author SHA1 Message Date
Kwabena W. Agyeman
30da5a062f lib/stai: Fix STAI NPU memory allocation.
The ST Neural ART code generator marks the HyperRAM mpool as cacheable
(CACHEABLE_ON), which causes the NPU stream engines to issue cacheable
accesses. However, the N6 memory subsystem does not support cacheable
accesses to internal memories, only external ones. Because of this,
relocating the HyperRAM region to internal memory results in invalid
access behavior: only base addresses are updated during relocation, not
the cacheable attributes.

In short, buffers generated for HyperRAM must remain in external memory.
Marking HyperRAM as non-cacheable is a possible workaround, but may
reduce performance if buffers are placed in AXI RAM instead.

Forcing the ext_ram_sz allocation to 1MB ensures that the ext_ram_sz
is allocated in SDRAM.
2025-11-01 18:28:22 -07:00
iabdalkader
b99a45a2a1 lib/stai: Poll events during inference.
Ensures pending events get serviced more often.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
2025-10-02 18:10:35 +02:00
iabdalkader
f8e110ca91 misc: Format code.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
2025-09-28 19:45:07 +02:00
Kwabena W. Agyeman
14d277c95b lib/stai: Add multi-tensor input/output support.
The name of the buffer being NULL defines the end of the buffer list.
2025-09-18 13:30:14 -07:00
iabdalkader
8df82bdc00 lib: Use common alignment macros.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
2025-07-16 11:18:56 +02:00
iabdalkader
e95a19c963 lib: Add STAI library and ML backend.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
2025-06-10 11:53:31 +02:00