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Author SHA1 Message Date
Andrew Leech
1a0afd9b1f
Merge b214c54c07 into 8759db0b6a 2025-11-02 08:05:46 +01:00

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@ -49,10 +49,6 @@
#include "ll_aton_caches_interface.h"
#include "ll_aton_reloc_network.h"
// Due to limitations with the STM32N6 NPU design, the ext_ram_sz memory pool
// must be in external SDRAM and not in internal SRAM. Forcing a minimum of a
// 1MB allocation ensures that the ext_ram_sz buffer ends up in SDRAM.
#define AI_MIN_EXT_RAM_SZ (1048576)
#define AI_RELOC_ALIGNMENT (32)
typedef struct ml_backend_state {
@ -136,10 +132,6 @@ int ml_backend_init_model(py_ml_model_obj_t *model) {
return -1;
}
if (rt.ext_ram_sz) {
rt.ext_ram_sz = OMV_MAX(rt.ext_ram_sz, AI_MIN_EXT_RAM_SZ);
}
// Allocate executable memory.
state->exec_ram_size = OMV_ALIGN_TO(rt.rt_ram_xip, AI_RELOC_ALIGNMENT);
state->exec_ram_addr = m_new(uint8_t, state->exec_ram_size + AI_RELOC_ALIGNMENT);